This work presents a reconfigurable 6.78 MHz Class-E wireless power transceiver capable of delivering up to 45 W output power for device-to-device (D2D) fast charging. On the TX side, an adaptive impedance-matching technique maintains the Class-E PA in ideal zero-voltage switching (ZVS) and zero-voltage-derivative switching (ZVDS) operation under varying RX-side loading conditions. In practical WPT operation, the TX load impedance changes with RX battery voltage, temperature, and coil distance, causing the Class-E PA to deviate from its optimal switching condition, leading to hard switching or reverse conduction and significant drops in system power and efficiency.
The proposed adaptive control dynamically adjusts both the equivalent resonant capacitance and the Class-E switch bypass capacitor to compensate for load impedance variations in real time. When reconfigured as an RX, the transceiver reuses the TX-side bypass-capacitor control method to perform maximum power point tracking (MPPT), achieving further power enhancement without additional hardware overhead.Fabricated in a TSMC 0.18 μm BCD process, the proposed system achieves a peak output power of 45 W
in D2D applications, with a total efficiency of 68% and TX efficiency of 93%.

This thesis presents a self-powered adaptive piling-up rectifier-less synchronized switch-harvesting-on-inductor (APReL-SSHI) interface for piezoelectric energy harvesting (PEH). The proposed interface introduces two distinct operational modes, energy transfer mode (ETM) and voltage piling-up mode (VPM), that adaptively select the optimal mode based on varying vibration excitation levels to maximize energy extraction. This adaptive piling-up mechanism effectively addresses the inherent limitation of the narrow optimal rectified voltage range (ORVR) seen in conventional S-SSHI rectifiers by enabling capacitor charging beyond standard thresholds. Experimental results demonstrate that the proposed APReL-SSHI circuit achieves up to 5.27 times the maximum output power compared to a full-bridge rectifier (FBR) and expands the ORVR by 4.16 times compared to a conventional S-SSHI circuit. Consequently, the APReL-SSHI delivers superior balance between these two key performance metrics relative to existing state-of-the-art rectifiers. Moreover, the circuit uniquely exhibits a secondary output power peak, reaching approximately 94\% of maximum power when operated above the standard maximum power point (MPP) voltage. Under constant input conditions, the voltage associated with this secondary power peak is easily adjustable, thereby facilitating direct voltage matching for diverse load requirements and achieving near-MPP tracking efficiency of 94\% without the need for an additional MPPT controller.

Cold-chain logistics demand precise temperature monitoring to ensure the safety and quality of perishable goods during transport. Conventional solutions rely on battery-powered temperature loggers, which contribute significantly to electronic waste due to limited reusability. This thesis addresses this environmental concern by contributing to the development of a fully batteryless, wireless temperature logger designed for long-duration cold-chain monitoring. Focusing on the sensing and data logging subsystem, this work presents the design and implementation of an ultra-low-power system capable of accurate temperature readout and multi-week data storage under strict energy constraints. The system integrates a microwatt-level temperature sensor, a power-optimized microcontroller, and energyefficient logging strategies to balance measurement accuracy, memory use, and power consumption. The final implementation is shown to have an idle power draw of <1μW and an energy use of 14μJ over the measurement and storage period, with a peak power of 411μW . The temperature measurements were found to be accurate within ±0.5°C . This accuracy and energy efficiency, demonstrates its potential as a sustainable alternative to traditional battery-powered loggers

Global cold-chain logistics demands compact, maintenance-free data loggers that document storage conditions without adding batteries or e-waste. This thesis presents the wireless transmission subsystem of a fully batteryless platform that harvests energy, stores data locally, and transmits it through an NFC link. After researching wireless standards, an ISO 15693/NFC-Forum Type-5 solution built around STMicroelectronics’ ST25DV64KC dynamic tag was selected for its I²C and RF dual-interface, non-volatile EEPROM and energy-harvesting capabilities.

The tag communicates with an ultra-low-power STM32U083 microcontroller over its I²C-bus to store the temperature data. Then, the data is transmitted to the reader via the connected antenna through the 13.56 MHz NFC electromagnetic field. At the same time, the antenna harvests residual energy from the reader, which is stored in an auxiliary capacitor. This stored energy provides a start-up power source for the energy harvesting system. Finally, a Python desktop script translates raw memory blocks into timestamped curves to visualise the logged temperature data.

Tests show that the NFC field of recent smartphones can provide sufficient energy for at least a full system duty-cycle in a single read. Additionally,the ST25DV64KC enables secure, wireless data retrieval , completing the architecture for integration into the project’s complete batteryless logger. Improvements can be made by optimising the auxiliary capacitor storage, antenna design, possible readout by NDEF and the UI by thorough software design.

This thesis presents the design and development of an energy harvesting system enabling a batteryless, wireless temperature-sensing data logger, intended for monitoring cargo conditions during maritime transport. The system harvests energy via inductive coupling, where a low-profile receiver coil captures power from an alternating magnetic field generated by a ceiling-mounted transmitter coil. This study specifically addresses key design considerations such as coil design, resonance-matching, Schottkydiode-based rectifification, robust voltage regulation by means of a buck-boost converter and a dual-capacitor energy storage scheme for reliable energy storage and voltage stability. The design overcomes core challenges in long-range wireless power transfer (WPT) including efficient energy extraction under low-power conditions, stable voltage regulation, and reliable start-up and operation within the constraints of a shipping container. The prototype achieves stable 2.1 V output from harvested energy alone, operating effectively at distances up to 1.4 m, while simulations confirm feasibile operation at the required 2.4 m range intended for its real-life application. The proposed solution achieves a self-sustaining, maintenance-free approach to temperature monitoring, enhancing cargo safety and contributing to the reduction of electronic and food waste. This system offers a scalable, adaptable, low-maintenance alternative to disposable battery-powered sensors, Improving sustainable cold-chain conditions monitoring and adhering to EU electromagnetic exposure limits.

As the Internet of Things (IoT) continues to expand across various industries, the demand for self-generating and sustainable power solutions is increasing more urgent. Piezoelectric energy harvesters offer a promising solution as they can generate electrical energy from ambient mechanical vibrations and operate independently even in locations that are difficult to reach. This thesis explores the modeling and measurements of a piezoelectric harvesting (PEH) system designed to power a low-power IoT circuit embedded in aircraft wings. Focusing on a piezoelectric cantilever beam implementation made from a PZT-5H transducer, the research evaluates three commercial models developed by 'Mide Technology': PPA-1021, PPA-2011 and PPA-4011. Every model is evaluated for their performance under mechanical vibrations in the 30-120 Hz range, characteristic for aircraft environments. The methodology includes electromechanical modeling and a structured series of laboratory experiments to validate key parameters such as resonance frequency tuning, impedance matching, power output, and behavior in noisy environments. Among the tested models, the PPA-2011 demonstrated the best overall performance achieving a peak power output of 1.61 mW at resonance of 58 Hz and was able to stably power an IoT circuit even in a noisy environment. The results validate the ability to use PEHs for the power generation of aircraft wireless sensor networks. Future work should explore long-term stability and extensive testing of real-world aircraft vibrations.

This thesis presents the design and evaluation of a low-power wireless sensor system intended to operate in conjunction with a vibrational piezoelectric energy harvester and a power conditioning circuit inside a plane wing. The system was tested in a controlled laboratory environment under various configurations, including different transmission modes, power levels, and sampling frequencies, to assess its performance, energy efficiency, and stability. Key findings indicate that sampling frequency significantly influences measurement stability. Continuous transmission mode, where data is sent without delay, while offering high temporal resolution, introduced greater variability in temperature readings, likely due to environmental noise and power supply fluctuations. In contrast, burst mode, which only sends 3 measurements in quick succession, achieves a better balance between resolution and stability, suggesting that incorporating intentional delays can mitigate noise sensitivity. Thermal recovery tests revealed that sampling density affects response time, with delayed mode showing slower returns to baseline, possibly due to self-heating or insufficient data resolution. An attempt to implement a low-power sleep mode revealed that actual current consumption did not decrease as expected, indicating an incomplete power-down mode and highlighting the need for further investigation into power management. The power consumption study confirmed that oscillator frequency and transmission power significantly affect current draw, although an anomaly observed at 4 MHz in delayed mode suggests potential efficiency zones in the transceiver’s operation. Integration with the energy harvester demonstrated the system’s ability to function under energy-constrained conditions. Testing with different storage capacitors showed that a 680 𝜇F capacitor provided the best balance between data transmission quality and energy availability. These results highlight trade-offs between energy storage capacity and responsiveness, and emphasize the importance of hardware optimization in energy-autonomous sensor systems.

Piezoelectric Energy Harvesting (PEH) offers a viable and sustainable solution for powering low-power electronic systems in hard-to-reach or maintenance-intensive environments, such as those found in aviation. The focus of this thesis lies on the circuit design aspect of the system, encompassing harvesting efficiency, regulation, and adaptive switching logic. The results validate that the proposed design fulfills the energy demands of a low-power wireless sensor, even under irregular excitation patterns. A range of advanced rectifierless interface topologies are investigated, including Rectifierless Synchronous Electric Charge Extraction (ReL-SECE), Rectifierless Synchronized Switch Harvesting on Inductor (ReL-SSHI), and Parallel-SSHI (P-SSHI). These non-linear techniques are selected for their ability to maximize power output, eliminate diode thresholds, and dynamically adapt to varying load and vibration conditions, significantly improving power transfer compared to traditional full-bridge rectifiers. Energy storage is realized through the use capacitors due to their rapid charge/discharge characteristics and long operational life. To ensure circuit safety and longevity, an over-voltage protection mechanism is implemented using a shunt regulator in combination with a resistive voltage divider. Additionally, a dedicated voltage regulation stage is incorporated to maintain a stable 3.3 V DC output, necessary for reliable operation of downstream wireless transmitters and onboard sensor systems. The proposed system is designed to be energy-autonomous, capable of cold-start operation, and optimized for long-term deployment without the need for external maintenance or battery replacement. The approach aligns with current trends in micro-energy harvesting (MEH) for IoT applications, emphasizing compactness, adaptability, and robustness under real-world conditions. Overall, the system demonstrates the practical potential of intelligent, self-powered harvesting circuits in enabling sustainable sensor networks and instrumentation in modern aircraft environments.

This thesis presents the design, circuit implementation, and measurement results of energy-efficient interface circuits for piezoelectric energy harvesting (PEH).

Chapter 1 introduces the background and motivation for this work. It begins by discussing various application scenarios for wireless sensors and emphasizes the critical need for a sustainable power supply to ensure their long-term operation. Energy harvesting systems are identified as a promising alternative to traditional batteries, with piezoelectric energy harvesting standing out as an ideal solution due to the ubiquitous presence of ambient vibrations in the environment. Since efficient energy conversion requires dedicated interface circuits, the chapter reviews typical circuit architectures and highlights three main challenges in the state-of-the-art: the trade-off between system size and rectifier efficiency, the sensitivity and complexity of maximum power point tracking (MPPT) algorithms, and low end-to-end efficiency due to cumulative energy losses in cascaded architectures.

Chapter 2 provides a comprehensive review of existing interface circuits commonly used in PEH systems. To enhance the output power efficiency of rectifiers, various active rectification techniques have been proposed, such as Synchronized Switch Harvesting on Inductor (SSHI) and Synchronized Switch Harvesting on Capacitor (SSHC). However, SSHI requires bulky inductors, while SSHC depends on multiple dedicated flying capacitors, increasing the system’s overall volume. The chapter also introduces two widely used MPPT techniques—Fractional Open-Circuit Voltage (FOCV) and Perturb and Observe (P&O). Both approaches have their respective drawbacks: FOCV requires open-circuit voltage sampling and flipping efficiency calibration, which results in discontinuous tracking and energy loss; P&O, on the other hand, relies on complex circuitry and consumes significant power. Finally, the chapter analyzes the issue of cascaded energy losses in current system architectures, which leads to relatively low end-to-end efficiencies, typically ranging from 50% to 80%.

Chapter 3 addresses the challenge of minimizing rectifier volume without compromising efficiency by proposing a synchronized switch harvesting rectifier that utilizes reusable storage capacitors. In this design, three capacitors are shared to function both as energy storage elements and as temporary flying capacitors during the energy harvesting and piezoelectric transducer (PT) voltage flipping phases. These capacitors are dynamically reconfigured into nine connection states during the flipping period, effectively replicating the functionality of conventional SSHC flying capacitors. This sharing and reconfiguration technique significantly reduces system size. Measurement results show a PT voltage flipping efficiency of 78%, demonstrating the design’s potential for compact, high-efficiency energy harvesting applications.

Chapter 4 proposes a duty-cycle-based (DCB) MPPT algorithm to overcome the limitations of the FOCV and P&O techniques. The DCB algorithm establishes a direct relationship between the rectifier’s on-off duty cycle and its maximum power point (MPP). Mathematical analysis shows that maintaining a 50% duty cycle allows the system to operate at its MPP. Unlike FOCV, this approach eliminates the need for open-circuit voltage sampling and flipping efficiency calibration. It also avoids the complex power computations and hardware overhead associated with P&O. In addition to its simplicity, the DCB method offers robust tracking performance. Experimental results demonstrate a peak MPPT efficiency of up to 98%, with an average tracking efficiency of 94%.

Chapter 5 presents a single-stage bias-flip rectifier to address the issue of cascaded energy loss in conventional PEH system architectures. This design transfers energy directly from the PT to the output capacitor, reducing intermediate losses. By fixing the rectifier’s on-off duty cycle at 50% to achieve MPPT, the need for a separate rectified capacitor is eliminated, resulting in a shorter startup time and faster MPPT response. Experimental results show an end-to-end efficiency of up to 92.5%, with energy extraction performance improved by a factor of 9.3× compared to a full-bridge rectifier (FBR).

Chapter 6 summarizes the main findings of the thesis and compares the proposed designs in Chapters 3, 4, and 5 with the current state-of-the-art. It also outlines potential directions for future work, including 1) the development of a fully capacitive rectifier with output regulation, 2) MPPT strategies under non-ideal sinusoidal excitation conditions, and 3) power limit analysis and corresponding optimization techniques.

This Ph.D. dissertation focuses on designing high-precision readout frontends for low energy charge detection in scanning electron microscopy (SEM), achieving a time resolution of 2.5 ns, a detection error rate below 6 ppm, and power consumption under 400 μW. Novel techniques at both the system and circuit levels were developed to enhance operational accuracy and meet the target specifications. Two prototypes were presented and experimentally tested to demonstrate the effectiveness of these techniques.
Chapter 1 introduces the motivation, research objectives, and organization of the thesis, highlighting the advancements in SEMs for nanometer-resolution imaging and the challenges posed by high scanning speeds. It emphasizes the need for sensitive detectors and low-noise, power-efficient readout electronics, which often conflict. The main research question is defined as developing a frontend readout architecture with power consumption below 500 μW, time resolution of 2.5 ns, and an electron count error under 10 ppm. To address this, the thesis employs a systematic study and iterative design process, resulting in two novel readout frontend architectures. The chapter also outlines the structure of the thesis, covering the operating principles of the PIN diode, design details, experimental evaluations, and conclusions.
Chapter 2 provides a detailed review of the target application specifications, focusing on the design and requirements for detecting weak charge signals with high precision and time resolution. It critically analyzes the current state-of-the-art readout frontends, highlighting their strengths and inherent limitations, particularly in terms of noise performance, time resolution, and power consumption. This chapter also introduces the concept of short and open circuit readout modes for PIN-diodes, offering insights into their potential advantages for addressing the challenges identified in the existing systems.
Chapter 3 presents the design of readout solutions for the short circuit operation mode of PIN-diodes, critical for BSE detection in electron microscopy. It examines the use of a preamplifier to create a virtual ground, effectively simulating a zero-impedance load and ensuring accurate charge transfer. The chapter further explores the analog frontend components: preamplifier, signal shaping filters, and threshold discriminators. Signal shaping filters, both passive and active high-pass types, are discussed for their role in signal optimization by reducing noise and improving signal clarity. Additionally, the threshold discriminator design is analyzed for both filter types, emphasizing the importance of accurate signal discrimination to minimize detection errors. A key focus is the tradeoff between power consumption, noise performance, and detection accuracy, with each stage's design detailed to ensure optimal performance and signal integrity in the short circuit mode.
Chapter 4 explores readout solutions for the open circuit mode of PIN-diodes, focusing on high sensitivity, low power consumption, and signal integrity. It highlights challenges like charge pileup and saturation, proposing solutions such as a reset mechanism and dynamic comparators. The chapter discusses an advanced frontend architecture with offset compensation and active capacitor matching for improved accuracy. Periodic sampling at 800 MHz minimizes timing misalignments, balancing power efficiency and reliability for high-resolution, high-rate applications.
Chapter 5 discusses the experimental setup and qualification of the proposed readout architectures. The device under test (DUT), a 40 nm CMOS chip with short and open circuit mode readout matrices, is tested to validate its ability to detect and digitize charge signals within the specified power budget. The test includes evaluating performance across gain, noise, bandwidth, and threshold levels, using a programmable detector emulating circuit (DEC) to simulate charge signals. The setup features a FPGA-based Data Acquisition Board (DAB) for signal monitoring and a test PCB to run experimental qualifications.
Chapter 6 concludes the thesis by highlighting the development of advanced readout frontends for high-precision charge detection, achieving improved time resolution, accuracy, and power efficiency. The proposed designs, optimized for short circuit and open circuit modes, demonstrate excellent performance. This chapter also proposes and discusses some aspects of this work that could be explored for further improvements.

Due to the rapid development of smart homes, some low-power consumption appliances need AC mains to supply energy, so the demand for AC-DC converters is increasing. AC-DC converters using transformers are not suitable for low-power devices due to their large size and expensive price. The method of series capacitors is a good way to convert high-voltage AC to low-voltage DC but has the disadvantage of low output power.
In this report, a Short-Flip Switched-Capacitor-Based AC-DC Converter for 120/230 VRMS mains Interfaces is proposed. Its innovative use of two charge-clearing switches clears the remaining charge of the switched capacitor after each closure. In this way, the same small voltage drops when the switched capacitor is needed to be connected, which ensures a long conduction time. In addition, two switches are used for short-flip operation, so that the waveform after the capacitor divider can be quickly lowered to 0 voltage, which can move to the next half-period faster, and applying these two switches can improve the maximum output power by 15%. The proposed AC-DC converter was manufactured in the 180 nm BCD process, with a silicon area of 2 mm2. It was tested and achieved a maximum output power of 1.2W and a peak efficiency of 78%, the power density is 1100mW /cm2, which is better than the state-of-art.

This thesis presents the development of a high-efficiency, high-power output multi-path resonant DC-DC converter, designed to meet the growing demands of modern electronic systems that require robust load capability and effective thermal management. The proposed converter architecture leverages advanced semiconductor technologies, innovative design strategies, and optimized control techniques to achieve exceptional power density and efficiency.

In addressing the challenges associated with heat dissipation in high-power converters, the research focuses on minimizing power loss, which directly impacts the reliability and longevity of electronic components. The converter targets a frequency efficiency of 96.5%, ensuring optimal performance across a wide output range.

The work begins with a comprehensive review of existing DC-DC converter types, including their advantages and limitations. This sets the stage for the introduction of a novel multi-path resonant converter topology, which combines the strengths of inductive and capacitive conversion techniques to reduce conduction losses and enhance overall efficiency.

Control techniques for powering floating gate drivers are also explored, providing the necessary support for the converter’s operation under varying load conditions. The design is validated through extensive simulations, demonstrating the converter’s ability to handle high currents while maintaining high efficiency. A PCB prototype is also developed to further validate the proposed design.

The results of this research indicate that the proposed converter not only meets but exceeds current performance benchmarks, offering a viable solution for high-power density applications in data centres, telecommunications, and other industrial systems.

As wireless communication systems grow more complex, especially with the advent of 5G networks, the demand for efficient digital predistortion (DPD) techniques to improve the linearity and performance of power amplifiers (PAs) is increasing. Advanced neural network hardware accelerators like EdgeDRNN offer promising solutions to these challenges by enhancing computational efficiency and accuracy. This thesis provides a detailed evaluation of the EdgeDRNN hardware accelerator, which is applied by the OpenDPD network to tackle the common issues of computational complexity and parameter management that often impede DPD implementations. By employing high-level synthesis (HLS) for the linear layer within the EdgeDRNN model, the performance metrics can be improved. Through our research, we estimate the performance of the combined system, which has a latency of 6.50 microseconds and a throughput of 0.26 giga-operation per second. The study highlights EdgeDRNN’s performance and scalability, particularly in its ability to adapt to future wireless standards like 5G. However, the research also identifies some limitations on the performance, which sets a stage for future exploration. By designing and optimizing a new hardware accelerator for DPD, this work enables ultra-high-speed DPD solutions for next-generation wireless communication systems.

With the development of the Internet of Things (IoT) and biomedical technologies, the utilization of wearable devices has become an emerging trend, attracting attention to the powering solutions for these devices. Thermoelectric energy harvesting (TEH) is suitable for converting the temperature difference in the ambient environment to power wearable devices and IoT sensors. However, the DC voltage converted by the thermoelectric generator (TEG) still requires an energy harvesting interface, normally a DC-DC interface to provide the regulated power to the load. Consequently, the features of the TEG impose challenges to the implementation of the DC-DC interface. Due to the temperature dependency of the TEG, the DC-DC interface applied to the TEH system should be able to cope with the dual-polarity input voltage and be capable of achieving a high power conversion efficiency for a wide range of voltage conversion ratios.

As the use of Internet-of-Things (IoT) devices in medical treatment and health moni toring continues to expand, traditional battery-powered sensors are becoming increas ingly inadequateduetothechallengesassociatedwithbatteryreplacement,whichoften necessitates additional surgeries and medical care. In contrast, thermoelectric energy harvesting (TEH) systems, which convert ambient thermal energy into electrical energy, offer a sustainable solution for wearable devices. TEH systems, known for their high energy density and flexibility, have the potential to make IoT devices self-powered by utilizing ambient thermalenergy. However,itisdifficulttoefficiently extract powerfrom low-temperature gradients. Previous studies have only achieved high energy-harvesting efficiency within limited ranges of thermoelectric generator (TEG) voltage (VTEG) and TEG internal resistance (RTEG). This limitation arises due to the high power consump tion of control systems, which consume a significant portion of the harvested energy, particularly under low VTEG and high RTEG conditions. To address these challenges, an interface for TEH systems with ultra-low power consumption and precise control mod ules is urgently needed. This project is divided into two parts. The first part involves summarizing and com paring the state-of-the-art in TEH, with a focus on advanced techniques used in other TEH systems and the potential for ultra-low power consumption. The remainder of the thesis proposes an all-digital controlled TEH interface that incorporates SAR zero current sensing (ZCS) and digital Maximum Power Point Tracking (MPPT). Theoretical analysis, designdetails, andmeasuredperformanceofthissystem—thefirstfullydigital controlled TEHsystem—arethoroughlydiscussed. Thechiphasalreadybeenfabricated andtested

This paper reviews recent developments in the transmitter end of wireless power transfer (WPT) systems, focusing on the limitations of current solutions in addressing variations in the real part of the load resistance. Traditional Class D inverters are limited in high-frequency integrated circuit applications due to issues with parasitic capacitance charging/discharging and dead-time. While Class E inverters are more suitable for highfrequency applications, they are highly sensitive to load variations. To address this challenge, this paper proposes an impedance matching network based on dual-loop negative feedback, which can adjust in real-time according to changes in load resistance, thereby stabilizing output efficiency under varying load conditions. Through circuit design and simulation, the system achieves a maximum output efficiency of 95.16% at 100W output power and can accommodate variations in both the real and imaginary parts of the load, making it suitable for WPT system receivers with variable loads.

Piezoelectric (PE) and electromagnetic (EM) methods are two popular techniques for harvesting kinetic vibration energy. When combined, these methods can power self-sustaining wireless sensors that require higher power consumption. However, existing hybrid energy systems necessitate at least one large off-chip inductor for either bias-flip or DC-DC conversion. This large inductor significantly increases the system's volume, leading to integration issues in space-constrained Internet-of-Things (IoT) applications.
This thesis proposes a fully integrated PE-EM hybrid energy harvesting platform to address this issue. By properly arranging synchronous PE and EM phases, the new active-to-passive coil-sharing technique eliminates the need for an additional energy reservoir for bias-flip and DC-DC. The IC prototype, fabricated using the 0.18um BCD CMOS process, has been experimentally tested. Results show a flipping efficiency of up to 70%. Additionally, the proposed single-stage system structure allows the output to be parallel with the battery stage, achieving high end-to-end (E2E) efficiency.