Capacitive touch screens have become the dominant user interface over the past decade. Achieving high framerates with low power consumption remains a critical design goal for touch systems. The conventional charge-recycling technique reduces driving power by 64%, but it relies on off-chip capacitors. To address this issue, we propose a tri-level energy recycling scheme, in which energy released during the 2-to-1 transition is recycled to power the 0-to-1 transition on the complementary channel. This approach achieves a 25% power reduction using on-chip transmission gates. Additionally, a compressive sensing method is introduced to selectively process touched RX channels while bypassing the others, reducing the number of fine ADCs by a factor of four compared to conventional two-step sensing. The proposed techniques are implemented in a 65 nm CMOS process and integrated into a 32×20 channel prototype occupying 2.4 mm². Measurement results show that the chip consumes only 2.6 mW at a framerate of 1513 Hz. The signal-to-noise ratio (SNR) reaches 49.7 dB for finger touch and 28.7 dB for a 1 mm Φ stylus, resulting in an energy efficiency of 10.66 pJ/step.

The growing trend of the Internet of Things (IoT) involves trillions of sensors in various applications. An extensive array of parameters need to be gathered concurrently with high-precision, low-cost, and low-power sensor nodes, such as resistive (R) and capacitive (C) sensors. Single-chip channel fusion can be an effective solution, while it is challenging to suppress the noise and integrate massive I/O pads. However, conventional oversampling noise-shaping methods increase power consumption, which fails to meet the demand of long-term monitoring applications. In addition, existing R/C sensor-interface chips require a pair of I/O pads for each sensor, where the pad frame dominates the overall chip area in massive-channel integration. In this work, we demonstrate a 72-channel R&C sensor-interface chip for proximity-and-temperature sensing. A noise-orthogonalizing technique is proposed to eliminate the quantization noise at the signal frequencies, achieving an energy efficiency of 19.1 pJ/step/channel. Moreover, a pad-sharing technique is proposed to reduce the number of I/O pads by half, enabling 72 sensors to be read by 36 pairs of I/O pads. The chip is fabricated by 65-nm CMOS technology, and measurement results show resolutions of 286 Omega and 162 fF, respectively. The power consumption and die area are reduced to 0.74 mu text{W} /Channel and 0.038 mm2/Channel, respectively.

Body Channel Communication (BCC) offers a low-loss signal transmission medium for ultra-low-power wearable devices on human body [1]. However, the effective communication range on human body is limited to less than 1m in the state-of-the-art BCC transceivers [2], where the signal loss at the interface of body surface and BCC receiver remains to be one of the main bottlenecks. The limited communication range has blocked the popularization in many WBAN applications, such as signal transmission from to an intelligent insole to smart watch [3]. Relative to the high impedance of human body [4], the lower input impedance of BCC receiver induces significant signal loss. To reduce the interface loss, conventional interface front end (IFE) of BCC receivers was designed to be with a high input impedance [5], but the DC voltage bias decreased both the input impedance and signal gain of IFE.