Fan-Out Panel Level Package has become a trend in Silicon Carbide MOSFET packaging due to its superior electrothermal performance and cost-effectiveness. However, the increased size of multi-chip embedded FOPLP packaging introduces greater challenges in sample preparation and thermal-mechanical stresses. In this paper, a large-sized (20mm*20mm*0.78mm) FOPLP with 4 SiC MOSFETs embedded is investigated. A three-dimensional thermal-mechanical numerical model is derived based on heat conduction and elasticity theories. It utilized analytical solution of Fourier temperature conduction and finite difference results for thermoelastic models to describe the temperature and deformation distribution during the FOPLP operation. It also reveals the heat coupling issue of multiple chips. Compared with the finite element simulation, the proposed method shows less than 2.5 % error in temperature and 2.3 % error in deformation. The computational speed is one-tenth that of the finite element method, while the memory usage is reduced to one-fifth. To mitigate the influence of chip thermal coupling on temperature and warpage, an optimized layout was employed to achieve temperature uniformity improvement. Finally, FOPLPs with the two layouts were fabricated. The warpage was monitored using a digital image correlation platform. To achieve the same temperature, the current required for the optimized layout was increased by 9 %. The warpage of the optimized layout at 60 °C was reduced by 13.5 %, and at 100 °C it was reduced by 14.7 %, validating the accuracy of the model and the significance of thermal-decoupling.

Pressureless sintered silver paste is widely used in SiC power electronic packaging for its superior thermal and electrical properties, enabling efficient heat dissipation and improved device reliability. Current thermal conductivity models frequently assume isotropic thermal behavior to simplify heat transfer calculations, yet these models neglect the inherent anisotropic porosity of sintered silver materials. This omission introduces errors in the characterization of these materials' thermal performance. This research investigates how the spatial anisotropic distribution of pressureless sintered silver's microstructure impacts QFN packaging's overall thermal conduction performance. This investigation is achieved by comparing lateral/vertical porosity differences between two materials and applying multidimensional thermal conductivity modeling. Two types of pressureless sintered silver were employed as die-attach materials to fabricate SiC MOSFET-based QFN packaging. The sintered microstructures' lateral and vertical cross-sections were characterized using scanning electron microscopy (SEM), enabling quantitative extraction of anisotropic porosity distributions. Subsequently, a numerical model was developed using the extracted porosity data to enhance the accuracy of heat transfer predictions in sintered silver layers while considering anisotropic thermal conductivity. Thermal resistance characterization was conducted on two QFN packages, and the accuracy of the proposed modeling methodology was validated by establishing the interrelation between experimental thermal resistance measurements and theoretical thermal conductivity predictions. This study demonstrates a refined approach to evaluating and optimizing sintered silver materials, providing a more accurate and application-driven thermal management strategy for SiC MOSFET power packaging.

The study focuses on the optical and electrical properties of Tungsten Ditelluride (WTe2), a type II Weyl semimetal, as well as the influence of its self-limiting oxide (SLO) layer that forms during natural oxidation. WTe2 exhibits promising applications in photodetection and energy harvesting due to its unique gapless linear dispersion and Berry-field-enhanced nonlinear optical effects. However, surface oxidation poses a challenge as it degrades the performance of WTe2. By employing spectroscopic ellipsometry and Raman spectroscopy, the progression of the oxide layer’s thickness and its impact on the optical constants of WTe2 were examined. The results revealed a rapid increase in oxide thickness within the first 24 h, and it reached saturation at ∼10 nm after 45 h of atmospheric exposure. Electrical properties were explored using Kelvin Probe Force Microscopy, uncovering a modification in surface potential and Fermi level following oxidation. Additionally, a SLO/WTe2 heterojunction device exhibited a wide region of positive and negative coexisting photocurrent, highlighting the potential for logical operations in ambient air. Finally, the mechanism of operation of the device is discussed. The electrical and optical properties of the pristine, partially oxidized and fully oxidized WTe2 are analyzed using density functional theory calculations. It shows that the SLO layer has a significant effect on the optical and electronic properties, which is instructive for future wavelength-modulated device optoelectronic logic operations.

Power electronics devices, pivotal in advancing electronic system technology, are essential for energy saving, enhancing power control efficiency, reducing noise, and minimizing size and volume. The evolution of power modules is based on innovative packaging structures, technologies, and materials. This article provides a comprehensive review of inorganic nonmetallic packaging materials and technologies in power electronics packaging. It first analyzes the packaging structures and trends of power electronics. The article then discusses inorganic nonmetallic encapsulants such as cement and glass in detail. It also reviews traditional ceramic substrates and elaborates on the advantages of multilayer ceramic technologies, including low-temperature co-fired ceramics, as substrates, while looking forward to the commercialization of inorganic composite substrates such as SiCp/Al matrix composites and diamond. Subsequently, the article overviews inorganic nonmetallic fillers for thermal interface materials, emphasizing the application of two-dimensional materials such as graphene and boron nitride, and introduces inorganic nonmetallic phase change materials. Finally, it explores the application and future development trends of inorganic nonmetallic materials in embedded packaging technologies.