In metals and alloys, solute segregation at grain boundaries typically undermines cohesion and ductility. Here, we overturn this paradigm by showing that solvent Fe atoms can preferentially enrich low-angle grain boundaries (LAGBs) in a ferrous alloy, dramatically enhancing ductility. Cold rolling and aging generate coherent nanoprecipitates, a high dislocation density, and abundant LAGBs in an austenitic matrix, yielding an ultrahigh tensile yield strength of ∼ 1.74 GPa. Moreover, the solvent Fe enrichment at LAGBs lowers local stacking fault energy and activates austenite-to-martensite transformation under load. This transformation-induced plasticity effect stabilizes plastic flow, enabling a uniform elongation of ∼ 26.2 % despite the alloy’s exceptional strength. Our findings challenge conventional views of segregation and offer a new design strategy for ultra-strong, highly ductile alloys.

Fan-Out Panel Level Package has become a trend in Silicon Carbide MOSFET packaging due to its superior electrothermal performance and cost-effectiveness. However, the increased size of multi-chip embedded FOPLP packaging introduces greater challenges in sample preparation and thermal-mechanical stresses. In this paper, a large-sized (20mm*20mm*0.78mm) FOPLP with 4 SiC MOSFETs embedded is investigated. A three-dimensional thermal-mechanical numerical model is derived based on heat conduction and elasticity theories. It utilized analytical solution of Fourier temperature conduction and finite difference results for thermoelastic models to describe the temperature and deformation distribution during the FOPLP operation. It also reveals the heat coupling issue of multiple chips. Compared with the finite element simulation, the proposed method shows less than 2.5 % error in temperature and 2.3 % error in deformation. The computational speed is one-tenth that of the finite element method, while the memory usage is reduced to one-fifth. To mitigate the influence of chip thermal coupling on temperature and warpage, an optimized layout was employed to achieve temperature uniformity improvement. Finally, FOPLPs with the two layouts were fabricated. The warpage was monitored using a digital image correlation platform. To achieve the same temperature, the current required for the optimized layout was increased by 9 %. The warpage of the optimized layout at 60 °C was reduced by 13.5 %, and at 100 °C it was reduced by 14.7 %, validating the accuracy of the model and the significance of thermal-decoupling.

CANDECOMP/PARAFAC (CP) decomposition is the mostly used model to formulate the received tensor signal in a massive MIMO system, as the receiver generally sums the components from different paths or users. To achieve accurate and low-latency channel estimation, good and fast CP decomposition (CPD) algorithms are desired. The CP alternating least squares (CPALS) is the workhorse algorithm for calculating the CPD. However, its performance depends on the initializations, and good starting values can lead to more efficient solutions. Existing initialization strategies are decoupled from the CPALS and are not necessarily favorable for solving the CPD. This paper proposes a deep-learning-aided CPALS (DL-CPALS) method that uses a deep neural network (DNN) to generate favorable initializations. The proposed DL-CPALS integrates the DNN and CPALS to a model-based deep learning paradigm, where it trains the DNN to generate an initialization that facilitates fast and accurate CPD. Moreover, benefiting from the CP low-rankness, the proposed method is trained using noisy data and does not require paired clean data. The proposed DL-CPALS is applied to millimeter wave MIMO-OFDM channel estimation. Experimental results demonstrate the significant improvements of the proposed method in terms of both speed and accuracy for CPD and channel estimation.

Investigating the interconnection and strengthening mechanisms of die-attach layers is instrumental for advancing die attach process toward low-pressure and, ultimately, pressureless sintering while maintaining reliability. This study compares the microstructure and micromechanical heterogeneity of the pressure-assisted and pressureless regions in SiC die attach to elucidate the interconnection and strengthening mechanisms. Recrystallized grains make up 71.7 % of the pressureless region, markedly lower than the approximately 90 % observed in the pressure-assisted region, resulting in a higher porosity in the former. Evidence of both continuous dynamic recrystallization and discontinuous dynamic recrystallization is identified throughout the sintered layer. Microhardness reveals that the pressureless zone exhibits a hardness of 0.373 GPa, significantly lower than left (0.745 GPa) and right (1.832 GPa) of pressure-assisted region. All three regions share an average grain size of 400 ± 50 nm, and geometrically necessary dislocation density in pressureless zone exceeds that in pressure-assisted areas, neither of which can account for the difference in micromechanical performance. In contrast, the statistically stored dislocation (SSD) densities on the left and right of the pressure-assisted region are approximately 4.74 × 10¹⁴ m⁻² and 2.88 × 10¹⁵ m⁻², respectively—substantially higher than the 2.88 × 10¹⁴ m⁻² measured in the pressureless region. Collectively, these findings demonstrate that dislocation strengthening, and particularly SSD density, constitutes the dominant strengthening mechanism in silver sintered layers. This work not only provides new insights for enhancing reliability under low-pressure and pressureless sintering but also establishes a theoretical foundation for optimizing sintering material formulations.

Reducing parasitic parameters and thermal resistance is critical for advancing power electronic devices. This article designs and evaluates the three printed circuit board (PCB) embedded 1200 V SiC mosfet half-bridge packaging cells, where the traditional wire bonding process is replaced by a redistribution layer (RDL) technique. A comprehensive evaluation of their electrical performance, thermal management, and mechanical performance is conducted. The three solutions that employ panel, active metal brazing (AMB), and lead—frame carriers, are developed through a streamlined process that includes die attach, molding, drilling, plating, and etching. This packaging approach readily reduces the parasitic inductance to below 5 nH. By utilizing a single-layer RDL with mutual inductance cancellation, the power loop inductance is reduced to as low as 2.4 nH (at 10 MHz), and the gate loop inductance to 1.57 nH (at 10 MHz). The junction-to-case thermal resistances of the three solutions are 1.88, 1.03, and 0.73 K/W, respectively. Compared with the other two packaging cells, the cell selecting AMB as a carrier reduces SiC mosfet operational stress and deformation by approximately 34% and 75%. The lead—frame carrier offers superior thermal dissipation for potential TO package replacement in half-bridge topologies, while the panel solution is promising for dual-sided cooling applications. With low thermal resistance, minimal stress, and excellent backside electrical insulation, the packaging cell with an AMB carrier is ideally suited for integration with heatsinks in traction inverters.

During operation in environments containing hydrogen sulfide (H₂S), such as in offshore and coastal environments, sintered nanoCu in power electronics is susceptible to degradation caused by corrosion. In this study, experimental and molecular dynamics (MD) simulation analyses were conducted to investigate the evolution and mechanism of H₂S-induced corrosion of sintered nanoCu, and bulk Cu was used as the reference. The following results are obtained: (1) Both sintered nanoCu and bulk Cu reacted with O₂ prior to reacting with H₂S, forming Cu₂O, Cu₂S, CuO, and CuS. In addition, sintered nanoCu exhibited more severe corrosion. (2) For both sintered nanoCu and bulk Cu, H₂S-induced corrosion resulted in the deterioration of electrical, thermal, and mechanical properties, and sintered nanoCu experienced a greater extent of deterioration. (3) As was ascertained through Reactive Force Field (ReaxFF) MD simulations, the penetration of H₂S and O₂ combined with the upward migration of Cu resulted in the formation of a corrosion film. In addition, compared to bulk Cu, the H₂S and O₂ penetration in the sintered nanoCu structure was observed to occur to a greater depth, accounting for the more pronounced performance degradation.

Thermal management has always played a significant role in power module design. Double-sided heat dissipation is more efficient at transferring heat than the traditional package. Although there are several thermal modeling approaches to power modules, the application of the numerical models, which are computationally fast and accurate, has rarely been investigated for double-sided heat dissipation scenarios. This paper proposes a numerical heat conduction model of a double-sided heat dissipation power module with multiple chips embedded. The model was developed by solving Laplace’s equation for the temperature distribution of steady state heat transfer using the separated variable method. The individual chip placement, two-chip distance and orientation, and four-chip placement were discussed through this modeling approach. The optimal layout was found. Then, a half-bridge topology module that consisted of two chips was investigated. To verify the accuracy of the numerical model, Finite Element Analysis (FEA) of the model was performed using the same boundary conditions. The experiments were applied on the power cycling tester to extract the junction temperature and case temperature. The numerical methods show good temperature prediction accuracy compared to both FEA and experiments.

Silicon carbide (SiC) MOSFETs, as leading wide bandgap semiconductor devices, exhibit superior stability and reliability under high-temperature, high-switching frequencies, and high-power density operational conditions. SiC MOSFET with fan-out panel-level packaging (FOPLP) utilizes a redistribution layer (RDL) to substitute bonding wires, achieving low thermal resistance, electrical resistance, and parasitic inductance. This study proposes an optimal design strategy for SiC MOSFET FOPLP, considering parasitic inductance suppression, heat dissipation, thermal-mechanical reliability, and insulation enhancements. First, we establish the parasitic inductance, heat transfer network, and thermomechanical stress physical analytical models of SiC MOSFET FOPLP. Subsequently, the non-dominated sorting genetic algorithm (NSGA-II) and the improved multi-objective particle swarm optimization algorithm (MOPSO) are integrated to realize the co-optimization of parasitic inductance, thermal resistance, thermal stress, and electric field intensity distribution. Finally, we attain the optimal parameters of the SiC MOSFET FOPLP, i.e. chip thickness (x₁), solder thickness (x₂), RDL thickness (x₃), and chip side length (x₄) as 0.25 mm, 0.05 mm, 0.35 mm, and 6.00 mm, respectively. Additionally, according to comparison the MOPSO algorithm exhibits faster convergence and superior diversity than NAGA-II in the electrical-thermal-mechanical multiphysics co-optimization. Generally, the proposed physical analytical models combined with a multi-objective optimization method have a substantial guidance and forward-looking prospect on the design of SiC MOSFET FOPLP.

Rare earth elements (REEs) are vital to the development of low-carbon technologies. There are rising concerns in the United States and elsewhere about REE supply chain stability and risks given the unvalidated perception in the heavy reliance of China, by far the largest REE supplier. However, the relationship between key countries at different stages of global REE supply chains remains unclear. Here, we use a dynamic flow analysis to explore supply dependence between the United States and China by tracing REE flows from mineral mining to market between 2000 and 2022. Our results indicate complementary and cooperative US–China interactions, especially after 2018 when the United States became a net exporter of REE and China's largest supplier, and China became the largest importer of the US REEs and manufacturer of REE-enabled low-carbon technologies. This intensifying interdependence stabilizes REE supply chains and highlights the importance of cooperative REE trade networks.

Rare earth elements (REEs) are vital to the development of low-carbon technologies. There are rising concerns in the United States and elsewhere about REE supply chain stability and risks given the unvalidated perception in the heavy reliance of China, by far the largest REE supplier. However, the relationship between key countries at different stages of global REE supply chains remains unclear. Here, we use a dynamic flow analysis to explore supply dependence between the United States and China by tracing REE flows from mineral mining to market between 2000 and 2022. Our results indicate complementary and cooperative US–China interactions, especially after 2018 when the United States became a net exporter of REE and China's largest supplier, and China became the largest importer of the US REEs and manufacturer of REE-enabled low-carbon technologies. This intensifying interdependence stabilizes REE supply chains and highlights the importance of cooperative REE trade networks.

Titanium carbide MXene, Ti₃C₂T_x, exhibits ultrahigh capacitance in acidic electrolytes at negative potentials yet poor stability at positive potentials, resulting in low-energy densities for Ti₃C₂T_x-based symmetric supercapacitors. Utilizing “water-in-salt” electrolytes has successfully expanded the stable operation potential window of MXenes. However, this advancement comes at the cost of sacrificing their high capacitance in acidic electrolytes. In this work, we report an acidic “water-in-salt” (AWIS) electrolyte composed of sulfuric acid and saturated lithium halide, which effectively doubled the energy density of the Ti₃C₂T_x-based symmetric supercapacitor compared to those with bare acidic electrolytes. Specifically, the AWIS electrolyte successfully expanded the voltage window of the symmetric device to 1.1 V. A high specific capacitance of 112.34 F g^-1 (at 10 mV s^-1) was obtained due to the presence of proton redox. As a result, the symmetric device achieved a high-energy density of 19.1 Wh kg^-1 and a high capacitance retention of 96.3% after 10,000 cycles. This work demonstrates the importance of designing stable and redox-active electrolytes for high-energy MXene-based symmetric supercapacitors.

Corrosion protection is one of the most important issues when copper is applied in power electronics packaging as bonding wire, die attachment, interconnection, and DBC substrate. Covering a layer of corrosion-resistant encapsulation material is a worthy consideration to protect copper. In this paper, the corrosion-resistant effects of two organic encapsulation materials, polydimethylsiloxane (PDMS) and hexamethyldisiloxane (HMDSO), on the copper surface were performed by molecular dynamics simulations. Firstly, the Cu-coating bilayer models were constructed, and the binding performances of the encapsulation material/copper interface were evaluated through calculating their interaction energy, proving that the organic coatings can form interconnection on copper surface. Then, the diffusion processes of corrosive gas molecules (H₂S, H₂O and O₂) into the copper layer under different coating conditions were simulated, and both coatings exhibited good corrosion protection performances. The above results indicate that both PDMS and HMDSO have promising potential for copper corrosion protection in power electronics packaging. This may provide some guidance for corrosion protection of copper material used in power electronics packaging.

Power modules applied in offshore applications are facing risks of corrosion failures on die-attach materials due to high humidity and H₂S exposure. To investigate such corrosion behavior for sintered die-attach materials, we conducted a study with four groups of samples fabricated using copper and silver metal particles under different solvent systems. Such samples were firstly subjected to high-humidity-H₂S conditions for 168 h to simulate the harsh offshore environment. After undergoing corrosion, the primary compounds formed were CuO/Cu₂O and Ag₂S through SEM, XRD, and XPS analysis. Notably, the incorporation of epoxy resin into sintered copper joints resulted in a remarkable reduction in corrosion and a substantial improvement in electrical conductivity after the reaction. In contrast, while the addition of epoxy did not evidently reduce corrosion in silver joints, it did lead to a significant increase in shear strength. Furthermore, to gain further insights into the effect of epoxy resin on corrosion behavior, electrochemical analysis, and molecular dynamics simulations were conducted. Finally, the mechanical reliability of the corroded copper and silver joints was evaluated through thermal shock tests. In summary, sintered copper joints exhibited better anti-corrosion behaviors than sintered silver under high humidity and H₂S exposure, especially with the addition of epoxy resin. However, the corrosion products of sintered copper suffered from a sharp decrease in shear strength after thermal shock tests than sintered silver, which is probably due to the coefficient of thermal expansion mismatch.

As the next generation of semiconductor devices, SiC MOSFETs have demonstrated significant performance improvements in switching loss, switching frequency, and high-temperature operation compared to Si-based MOSFETs. However, the long-term reliability of such devices and their packaging continues to be a major concern. Towards addressing this challenge, this study proposes a multi-objective optimization design method for parasitic inductance (L), thermal strain (?), and thermal resistance (R) of SiC MOSFETs with Fan-Out Panel-Level Packaging (FOPLP). First, the orthogonal experimental design was employed to investigate the thickness effects of baseplate, solder, die and redistribution layer (RDL) on L, e, and R. Then, the multi-objective optimization was developed to simultaneously reduce L, G, and R. Finally the fatigue lifetimes of the optimized and initial SiC MOSFET FOPLP structures were compared to verify the optimization's accuracy. Study findings include: (1) Solder thickness was the most significant influence factor for L, e and R of SiC MOSFET FOPLP, L and R increased, and e decreased with increasing solder thickness; (2) The proposed multi-objective optimization method coupled with a genetic algorithm achieved 14.79, 8.96, and 9.28% reduction of L, e, and R, respectively; (3) The fatigue lifetime of solder (SAC305) was evaluated using the Coffin-Manson model, with predicted lifetimes before and after optimization being 6786 and 7085 cycles, respectively, demonstrating that the proposed approach significantly enhanced the designed SiC MOSFET FOPLP's long-term thermal cycling reliability.

Double-sided packages for heat dissipation are an efficient thermal management mechanism for power semiconductor devices. A fan-out panel-level packaging (FOPLP), as one of the double-sided forms, exhibits excellent electro–thermal characteristics and provides low stray inductance and thermal resistance. Besides, the temperature at each point within the structure is closely related to its thermo–mechanical properties and device reliability. However, thermal resistance is limited in describing the temperature distribution. Finite element analysis (FEA) requires time-consuming construction of 3D models. Therefore, to depict the temperature distribution of FOPLP rapidly and accurately, a numerical heat transfer model was proposed for the double-sided package structure. The solution was obtained from the steady-state thermal balance Laplace equation using the separation of variables method. Several boundaries were analyzed to determine the specific parameters in the model. Finally, the temperature field predicted by the derived numerical model was compared with finite element simulation results. The proposed model was consistent with both Silicon (Si) and Silicon Carbide (SiC) FOPLP structures within the error of 15 % at the center of the device, which verified the validity and accuracy of the numerical model for double-sided heat dissipation. The proposed models and results could contribute to the development of effective thermal design tools for double-sided thermal power modules.

Considerable advancements in power semiconductor devices have resulted in such devices being increasingly adopted in applications of energy generation, conversion, and transmission. Hence, we proposed a fan-out panel-level packaging (FOPLP) design for 30-V Si-based metal-oxide-semiconductor field-effect transistor (MOSFET). To achieve superior reliability of packaging, we applied the nondominated sorting genetic algorithm with elitist strategy (NSGA-II) and ant colony optimization-backpropagation neural network (ACO-BPNN) to optimize the design of redistribution layer (RDL) in FOPLP. We first quantified the thermal resistance and thermomechanical coupling stress of the designed package under thermal cycling loading. Next, NSGA-II and ACO-BPNN were used to optimize the size of the RDL blind via. Finally, the effectiveness of the proposed reliability optimization methods was verified by performing thermal shock reliability aging tests on the prepared devices.

SiC MOSFET is mainly characterized by the higher electric breakdown field, higher thermal conductivity, and lower switching loss enabling high breakdown voltage, high-temperature operation, and high switching frequency. However, their performances are considerably limited by the high parasitic inductance and poor heat dissipation capabilities associated with existing wire-bonding packaging methods. To address this challenge, a 1200 V/136 A fan-out panel-level packaging (FOPLP) SiC MOSFET with a size of $8\times {8} \times {0}.{75}$ mm was proposed. The electrical parameters of the devices were characterized experimentally. Both the static and dynamic parameters of the package matched the bare die values, which confirmed the functioning of the proposed packaging method for SiC MOSFET. The package parasitic inductance, thermal resistance, and soldering stress were analyzed through simulations. The reliability of the packages was evaluated by performing the thermal cycling test. The experimental results revealed that: 1) SiC MOSFET FOPLP had 0.36 nH drain-source parasitic inductance at 100 kHz, a 96% reduction compared with a conventional wire-bonded package; 2) double-sided cooling enabled the packages to exhibit a thermal resistance as low as 0.55 °C/W; and 3) after 2000 thermal cycling cycles, drain-source ON-state resistance [RDS(on)] increased by less than 2%, which revealed the higher reliability of the package under thermal cycling.

YAG: Ce3+ phosphor/silicone composites are widely used in solid-state lighting as a light converter to achieve white lighting. However, because of high thermal resistance and low thermal stability, the luminous performance of YAG: Ce3+ phosphor/silicone composite deteriorates rapidly when excited by high-power-density blue-laser. To explore the potential of blue laser-excited YAG: Ce3+ phosphor/silicone composites, the luminous performances under different blue laser power conditions were characterized by both the reflective and transmissive excitations using a self-built three-integrating-sphere system. Furthermore, the Monte-Carlo Ray-tracing simulation was used to illustrate the light-transmission and energy conversion mechanism in the phosphor/silicone composites. The results showed that: (1) The YAG: Ce3+ phosphor/silicone composite could be excited by the 0.292W laser light with the peak wavelength of 445nm, excessive laser power will cause phosphor thermal quenching and silicone carbonization. (2) The luminous flux of the composite under both the reflective and transmissive excitations gradually increased with the increase of phosphor concentration; correspondingly, the color coordinate moved to the yellow region, and the Correlated Color Temperature (CCT) gradually decreased. (3) The simulation results indicated that under the same phosphor concentration, the luminous flux obtained by reflection excitation was largely higher than that by the transmission excitation, as the light re-conversion and strong back-scattering were occurred in the reflective and transmissive laser excitation respectively.

A fan-out panel-level packaging (FOPLP) with an embedded redistribution layer (RDL) via interconnection reduces the size, thermal resistance, and parasitic inductance of power module packaging. In this study, the effect of the RDL via size on the reliability of a FOPLP SiC MOSFET power module was investigated. To improve the thermal management and thermal cycling reliability of the designed SiC module, genetic algorithm (GA)–assisted optimization methods were proposed to optimize the RDL via size. First, the heat dissipation and the plastic work density of the SiC MOSFET module with various via diameters and depths were simulated using finite element simulations. Next, both the ant colony optimization-backpropagation neural network (ACOBPNN) with finite element simulation and the nondominated sorting genetic algorithm (NSGA-II) with theoretical model were developed to optimize the RDL via size. The results revealed that: (1) smaller via depth and size reduce the heat dissipation and thermal cycling reliability of the RDL via; (2) through both the ACO-BPNN and NSGA-II, the same optimal heat dissipation and plastic work density can be achieved in the designed module. (3) ACO-BPNN with assist of finite element simulation can provide a more effective optimization in complex packaging structure.

The kinetics of the transformation of metallic Fe to the active Fe carbide phase at the start of the Fischer-Tropsch (FT) reaction were studied. The diffusion rates of C atoms going in or out of the lattice were determined using 13C-labeled synthesis gas in combination with measurements of the transient 12C and 13C contents in the carbide by temperature-programmed hydrogenation. In the initial 20 min, C diffuses rapidly into the lattice occupying thermodynamically very stable interstitial sites. The FT reaction starts already during these early stages of carburization. When reaching steady state, the diffusion rates of C in and out of the lattice converge and the FT reaction continues via two parallel reaction mechanisms. It appears that the two outer layers of the Fe carbide are involved in hydrocarbon formation via a slow Mars-Van Krevelen-like reaction contributing to ∼10% of the total activity, while the remainder of the activity stems from a fast Langmuir-Hinshelwood reaction occurring over a minor part of the catalyst surface.