Genetic Algorithm–Assisted Design of Redistribution Layer Vias for a Fan-Out Panel-Level SiC MOSFET Power Module Packaging
Jiajie Fan (Fudan University, Research Institute of Fudan University, Ningbo)
Yichen Qian (Hohai University)
Wei Chen (Fudan University)
Jing Jiang (Fudan University)
Zhuorui Tang (Fudan University)
Xue-Jun Fan (Lamar University)
Guo Qi Zhang (TU Delft - Electronic Components, Technology and Materials)
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Abstract
A fan-out panel-level packaging (FOPLP) with an embedded redistribution layer (RDL) via interconnection reduces the size, thermal resistance, and parasitic inductance of power module packaging. In this study, the effect of the RDL via size on the reliability of a FOPLP SiC MOSFET power module was investigated. To improve the thermal management and thermal cycling reliability of the designed SiC module, genetic algorithm (GA)–assisted optimization methods were proposed to optimize the RDL via size. First, the heat dissipation and the plastic work density of the SiC MOSFET module with various via diameters and depths were simulated using finite element simulations. Next, both the ant colony optimization-backpropagation neural network (ACOBPNN) with finite element simulation and the nondominated sorting genetic algorithm (NSGA-II) with theoretical model were developed to optimize the RDL via size. The results revealed that: (1) smaller via depth and size reduce the heat dissipation and thermal cycling reliability of the RDL via; (2) through both the ACO-BPNN and NSGA-II, the same optimal heat dissipation and plastic work density can be achieved in the designed module. (3) ACO-BPNN with assist of finite element simulation can provide a more effective optimization in complex packaging structure.