Ion implantation and subsequent annealing reshape the defect landscape and stress state of compound semiconductors, yet the temperature-dependent mechanisms in SiC remain incompletely understood. Here, we utilize molecular dynamics (MD) simulations and confocal micro-Raman measurements to resolve how implantation temperature and post-annealing regulate lattice disorder, amorphization kinetics, and residual-stress evolution in chemical vapor deposited (CVD) 4H-SiC. MD reveals surface-nucleated amorphization that propagates inward, whereas elevated implantation temperatures activate defect recombination pathways that suppress amorphous-layer formation. Raman signatures of optical-phonon shifts, linewidth broadening, and amorphization bands track the coupled evolution of lattice disorder and stress. Experimentally, increasing implantation temperature smooths the surface (S_a 0.133 → 0.101 nm) and reduces the amorphous-layer thickness (from ∼700 nm at 25°C to undetectable at 500°C), while driving more compressive residual stress (−57 → −132 MPa). Post-annealing largely restores phonon lifetimes and eliminates amorphization signatures, consistent with the recovery trends predicted by MD. These results delineate a thermal-treatment window that controls amorphization and residual stress in 4H-SiC, providing a transferable Raman-based methodology for nondestructive assessment of implantation-induced damage in compound semiconductors.

In this work, 4H-SiC homoepitaxial layers were grown on 4°off-axis substrates at different susceptor rotation speeds by using a hot-wall horizontal CVD reactor. The effect of different susceptor rotation speed on the quality of 4H-SiC epitaxial layers in terms of thickness, thickness uniformity, crystallinity, surface morphology and morphological defects was investigated via Fourier transform infrared spectroscopy (FTIR), high-resolution X-ray diffraction (XRD), atomic force microscopy (AFM), confocal differential interference contrast microscopy (CDIC), ultra-violet photo-luminescence spectroscopy (UV-PL), scanning electron microscopy (SEM), and micro-Raman spectroscopy, respectively. A flow field simulation was performed to explain the impact of susceptor rotation speed on the film deposition. The FTIR results suggested that the susceptor rotation speed could be an important factor to adjust thickness uniformity and deposition rate. The XRD patterns showed that crystallinity was independent of the susceptor rotation speed. The surface morphology can be improved by changing the susceptor rotation speed. According to CDIC scans, the down-fall related defects were reduced through the increase in the susceptor rotation speed. The origin of down-fall related defects was interpreted by Raman spectroscopy and speculative models. To sum up, the susceptor rotation speed is a crucial factor in increasing growth rate and improving uniformity. Also, the faster susceptor rotation speed helps reduce the number of down-fall related defects in the hot-wall CVD reactor.

4H-SiC is widely used in power electronics owing to its superior physical properties. However, temperature-induced stresses compromise the reliability of 4H-SiC power devices in high-temperature applications, warranting precise, and nondestructive stress characterization responsive to temperature variations. Herein, a temperature-dependent predictive model is proposed for analyzing the Raman shift–stress in 4H-SiC. The 4H-SiC epitaxial samples prepared via chemical vapor deposition are characterized using in situ variable-temperature Raman spectroscopy, resulting in a temperature correction factor of approximately −0.021 cm−1 K−1, which is integrated into the conventional Raman shift–stress relationship to assess stress variations induced by temperature variations. The elastic modulus tensor of 4H-SiC at various temperatures determined using molecular dynamics simulations indicates a linear reduction in modulus with increasing temperature. This variable temperature modulus is incorporated into the Raman shift–stress relationship. Furthermore, a finite element method is used for model simplification to perform stress calculations in three axial directions. The experimental results confirm the consistency between calculated and experimental values with a 10% error range under the uniaxial stress condition. The study findings provide valuable insights into assessing stress evolution in 4H-SiC under temperature variations based on Raman spectroscopy, thereby advancing the application of spectroscopic techniques in material stress detection.

This work addresses a novel technique for selecting the best process parameters for the 4H–SiC epitaxial layer in a horizontal hot-wall chemical vapor reactor using a transient multi-physical (thermal-fluid-chemical) simulation model and combined with a machine-learning model. An experiment was performed to validate the feasibility of the numerical model. Secondly, a single-factor analysis was conducted to investigate the effects of process parameters, including the deposition temperature, inlet-flow volume, rotational speed of the susceptor, and cavity pressure, on the quality of the 4H–SiC epitaxial layer. Finally, a machine learning algorithm, the ant colony optimization-back propagation neural network (ACO–BPNN), was employed to develop the input/output model and optimize process parameters for obtaining a high-quality epitaxial layer and reducing the optimization cycle and costs. Notably, the optimized process was validated by real experiments, where the error between calculation and experiment is 4.03 % for deposition rate and 0.49 % for coefficient of variation, respectively. The results highlight the model as reliable and lay the foundation for the CVD growth of the 4H–SiC epitaxial layer.

The silicon carbide (SiC) epitaxial growth process is crucial in chip manufacturing. The distribution of the flow and temperature fields in the reactor chamber influences the epitaxial layer uniformity. Therefore, this study optimizes the distribution of the flow and temperature fields inside the reactor to enhance the quality of the epitaxial layer. COMSOL Multiphysics is used to model the horizontal chemical vapor deposition (CVD) reactor chamber, and the flow and temperature fields inside the reactor chamber are analyzed. Factors influencing the uniformity of flow field distribution include the reactant gas distribution and the gas-inlet tunnel’s diameter and position. The flow field uniformity is represented by the relative standard deviation of the velocity. Parameters impacting the temperature field uniformity include the position and pitch of the heating coil and the graphite column width. The heating efficiency of the substrate and temperature uniformity are expressed by the average temperature and standard deviation of the temperature, respectively. Support vector machine (SVM) is used to establish the relationship between design variables and the objective function, and the multi-objective particle swarm optimization (MOPSO) algorithm is used to optimize the reactor. The proposed approach improves the uniformity of the flow and temperature fields and the heating efficiency of the substrate.

The silicon carbide (SiC) epitaxial growth process is crucial in chip manufacturing. The growth rate and uniformity of epitaxial film are two critical evaluation criteria of epitaxial process. In order to obtain a higher growth rate and more uniform epitaxial film, it is necessary to improve the SiC epitaxial growth process. The traditional method to improve the epitaxial growth process is the “trial and error method”, but this method will consume a lot of time and economic costs. Therefore, it is necessary to find an efficient way to simulate the epitaxial growth process of SiC. This work uses computer aided Multiphysics simulation method to study the growth of SiC epitaxial films in a horizontal hot-wall chemical vapor deposition (CVD) reaction chamber. Firstly, a three-dimensional model of a horizontal hot-wall CVD reaction chamber is established, in which the MTS (methyltrichlorosilane)/H2 is used to deposit SiC epitaxial films on large-area substrates. The effects of temperature, gas flow distribution ratio, and pallet speed on the growth rate and uniformity of SiC epitaxial films are studied. The results show that: 1) In the range of 1500K-1600K, the higher temperature brings the higher growth rate of SiC epitaxial film. 2) The gas flow ratio of three groups of air inlets can simultaneously affect the growth rate and uniformity of the SiC epitaxial film. With the greater the airflow at the middle air inlet, the higher growth rate and the lower film uniformity will be obtained. 3) The tray rotation speed does not affect the film growth rate, but the higher of film uniformity will be achieved under the higher tray rotation speed. The simulation results agree well with the experimental results, which proves that the Multiphysics simulation method is feasible and can be used for further optimization of the epitaxial growth process of SiC.

Silicon carbide (SiC) epitaxial process is a key step in the fabrication of power devices, and the temperature field inside the reactor chamber plays an essential role in this process. In this paper, the temperature field in the horizontal chemical-vapor-deposition reactor chamber used for growing homo-epitaxial 4H-SiC material is studied using the finite-element method. A three-dimensional time-dependency model is built for the accuracy of simulation, and the effects of 11 relative coil locations (−50, −28, −18, −10, −4,0,4,10,18,28, and 50 mm) on heating efficiency and temperature uniformity of the substrate are analyzed. Results indicate that the suitable relative location between the center of coil and that of the substrate to achieve optimum temperature uniformity is −4 mm, and 18 mm to obtain the highest heating efficiency. To increase the heating efficiency and temperature uniformity of the substrate, the structure of the reactor was analyzed and optimized. It is observed that both heating efficiency and temperature uniformity can be effectively improved by adding a graphite pillar inside the down susceptor.

A fan-out panel-level packaging (FOPLP) with an embedded redistribution layer (RDL) via interconnection reduces the size, thermal resistance, and parasitic inductance of power module packaging. In this study, the effect of the RDL via size on the reliability of a FOPLP SiC MOSFET power module was investigated. To improve the thermal management and thermal cycling reliability of the designed SiC module, genetic algorithm (GA)–assisted optimization methods were proposed to optimize the RDL via size. First, the heat dissipation and the plastic work density of the SiC MOSFET module with various via diameters and depths were simulated using finite element simulations. Next, both the ant colony optimization-backpropagation neural network (ACOBPNN) with finite element simulation and the nondominated sorting genetic algorithm (NSGA-II) with theoretical model were developed to optimize the RDL via size. The results revealed that: (1) smaller via depth and size reduce the heat dissipation and thermal cycling reliability of the RDL via; (2) through both the ACO-BPNN and NSGA-II, the same optimal heat dissipation and plastic work density can be achieved in the designed module. (3) ACO-BPNN with assist of finite element simulation can provide a more effective optimization in complex packaging structure.