SG-TFTs fabricated by the ?-Czochralski process have already reached a performance as high as that of SOI MOSFET devices. However, one of the most important and challenging goals is extending SG-TFT technology to reach a higher level of performance than that achieved with SOI technology. This thesis considers two different aspects of this question. Firstly, given the proven potential of the ?-Czochralski process to provide high-quality crystalline silicon, it is also of interest to investigate whether the ?-Czochralski process could also be used to produce high-mobility semiconductor materials such as germanium (Ge) sputtered at low temperature as a medium for future thin-film transistor applications, since Ge is considered to be a potential replacement for silicon (Si) because of its much higher carrier mobility. Secondly, it is also worth while investigating whether the field-effect mobilities of n- and p-channel single-grain Si TFTs could be enhanced compared with to the most advanced strained-Si on SiGe MOSFET technology by applying strain with excimer laser crystallization, despite the low process temperature used. The study of degradation phenomena in SG-TFTs under bias stress is also of fundamental importance for the reliability analysis of such devices. A method for degradation analysis of SG-TFTs under bias stress for 2D modeling by a TCAD simulator has therefore been developed as part of the present study. Such modeling aims to improve our understanding of high voltage applications. A prototype E-Paper with active-matrix quick-response liquid powder display has been designed and developed with the aid of SG-TFT technology on this basis. The main issue in the development of such E-Paper is the requirement for a 70 V supply voltage. The necessary SG-TFT produced by the ?-Czochralski process must therefore be designed to operate at such a high voltage, and its fabrication process must be compatible with the ?-Czochralski process used to make standard SG-TFTs for the development of a fully integrated E-Paper with display and driver circuits. No application using of SG-TFTs fabricated by the ?-Czochralski process would be possible without an accurate compact SPICE model of the intended device. Many SPICE models are commercially available nowadays for both MOSFET and Poly-Si TFT technologies. However, none of those is suitable for SG-TFTs. An accurate SPICE model of SG-TFT circuits designed for digital, analog and RF applications has been developed as part of the present study. In particular, a unified SPICE model has been obtained that is applicable both to SG-TFTs fabricated by crystallization at low laser energy (which have poly-Si-like performance) and to TFTs made by crystallization at high laser energy (which have SOI-like performance).