A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm

Journal Article (2016)
Author(s)

Masoud Babaie (TU Delft - Electronics)

F Kuo (Taiwan Semiconductor Manufacturing Company (TSMC))

H Chen (Taiwan Semiconductor Manufacturing Company (TSMC))

Lan Chou Cho (Taiwan Semiconductor Manufacturing Company (TSMC))

CP Jou (Taiwan Semiconductor Manufacturing Company (TSMC))

Fu-Lung Hsueh (Taiwan Semiconductor Manufacturing Company (TSMC))

M. Shahmohammadi (TU Delft - Electronics)

R. B. Staszewski (University College Dublin)

Research Group
Electronics
Copyright
© 2016 M. Babaie, F Kuo, H Chen, L Cho, C. P. Jou, F. L. Hsueh, M. Shahmohammadi, R.B. Staszewski
DOI related publication
https://doi.org/10.1109/JSSC.2016.2551738
More Info
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Publication Year
2016
Language
English
Copyright
© 2016 M. Babaie, F Kuo, H Chen, L Cho, C. P. Jou, F. L. Hsueh, M. Shahmohammadi, R.B. Staszewski
Research Group
Electronics
Issue number
7
Volume number
51
Pages (from-to)
1547-1565
Reuse Rights

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Abstract

We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors. An all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin. It also reduces 1/f noise and supply pushing, thus allowing the ADPLL, after settling, to reduce its sampling rate or shut it off entirely during a direct DCO data modulation. The switching power amplifier integrates its matching network while operating in class-E/F2 to maximally enhance its efficiency at low voltage. The transmitter is realized in 28 nm digital CMOS and satisfies all metal density and other manufacturing rules. It consumes 3.6 mW/5.5 mW while delivering 0 dBm/3 dBm RF power in Bluetooth Low-Energy mode.

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