Effects of Voids on Mechanical and Thermal Properties of the Die Attach Solder Layer Used in High-Power LED Chip-Scale Packages

Abstract

High-power light-emitting diode (LED) chip-scale packages (CSPs) prepared by the flip-chip technology have become one of the most promising light sources. The die attach solder layer always plays an important role in heat dissipation, mechanical support, and electronic conductivity. Among different types of solder materials, Sn-3.0Ag-0.5Cu (SAC305) solder alloy shows its great competitiveness on solderability and mechanical properties for the interconnection of high-power LED CSPs. However, reliability problems caused by voids in the SAC305 solder limit its wide application in the high-power LED chip-scale packaging process. Existence of the voids has been considered as one of the major issues causing chip-on-substrate level reliability problems in microelectronic and optoelectronic devices. In this paper, mechanical and thermal properties of SAC305 solder layers with arbitrary voids used in high-power LED CSPs are studied with both finite-element simulations and experiments. The results show that void size and void position within the solder layer are the two most critical issues on the shear strength of interconnection and the chip-on-substrate level thermal distribution in high-power LED CSPs.