High-Performance Data Mapping for BNNs on PCM-Based Integrated Photonics

Conference paper (2024)

Authors

Taha Shahroodi Computer Engineering - EEMCS
Raphael Cardoso École Centrale de Lyon
J.S.S.M. Wong Computer Engineering - EEMCS
Alberto Bosio École Centrale de Lyon
Ian O'Connor École Centrale de Lyon
S. Hamdioui Computer Engineering - EEMCS
Research Group
Computer Engineering (EEMCS) (TU Delft)
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Published Date

2024

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

State-of-the-Art (SotA) hardware implementations of Deep Neural Networks (DNNs) incur high latencies and costs. Binary Neural Networks (BNNs) are potential alternative solutions to realize faster implementations without losing accuracy. In this paper, we first present a new data mapping, called TacitMap, suited for BNNs implemented based on a Computation-In-Memory (CIM) architecture. TacitMap maximizes the use of available parallelism, while CIM architecture eliminates the data movement overhead. We then propose a hardware accelerator based on optical phase change memory (oPCM) called EinsteinBarrier. Ein-steinBarrier incorporates TacitMap and adds an extra dimension for parallelism through wavelength division multiplexing, leading to extra latency reduction. The simulation results show that, compared to the SotA CIM baseline, TacitMap and EinsteinBarrier significantly improve execution time by up to ∼ 154× and ∼ 3113×, respectively, while also maintaining the energy consumption within 60% of that in the CIM baseline.