ArtA

automating Design Space Exploration of spin-qubit architectures

Journal Article (2025)
Author(s)

N. Paraskevopoulos (TU Delft - QCD/Almudever Lab, TU Delft - QCD/Feld Group, TU Delft - QuTech Advanced Research Centre)

David Hamel (Student TU Delft)

A. Sarkar (TU Delft - Quantum & Computer Engineering, TU Delft - QCD/Feld Group, TU Delft - Communication QuTech)

Carmina Almudever (Computer Engineering Department, Universitat Politécnica de Valencia, QCD/Sebastiano Lab)

S. Feld (TU Delft - Communication QuTech, TU Delft - QCD/Feld Group, TU Delft - Quantum & Computer Engineering, TU Delft - Quantum Circuit Architectures and Technology)

Research Group
QCD/Almudever Lab
DOI related publication
https://doi.org/10.1007/s11128-025-04759-w
More Info
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Publication Year
2025
Language
English
Research Group
QCD/Almudever Lab
Issue number
6
Volume number
24
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Abstract

In the fast-paced field of quantum computing, identifying the architectural characteristics that will enable quantum processors to achieve high performance across a diverse range of quantum algorithms continues to pose a significant challenge. Given the extensive and costly nature of experimentally testing different designs, this paper introduces the first Design Space Exploration (DSE) for quantum-dot spin-qubit architectures. Utilizing the upgraded SpinQ compilation framework, this study explores a substantial design space comprising 29,312 spin-qubit-based architectures and applies an innovative optimization tool, ArtA (Artificial Architect), to speed up the design space traversal. ArtA can leverage 17 optimization configurations, significantly reducing exploration times by up to 99.1% compared to a traditional brute force approach while maintaining the same result quality. After a comprehensive evaluation of best-matching optimization configurations per quantum circuit, ArtA suggests specific as well as universal architectural features that provide optimal performance across the examined circuits. Our work demonstrates that combining DSE methodologies with optimization algorithms can be effectively used to generate meaningful design insights for quantum processor development.