A 1MW -101DB THD+N Class-AB High-Fidelity Headphone Driver in 65NM CMOS

Conference Paper (2018)
Author(s)

Nandish Mehta (University of California)

Johan Huijsing (TU Delft - Electronic Instrumentation)

Vladimir Stojanović (University of California)

Research Group
Electronic Instrumentation
DOI related publication
https://doi.org/10.1109/VLSIC.2018.8502397 Final published version
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Publication Year
2018
Language
English
Research Group
Electronic Instrumentation
Volume number
2018-June
Article number
8502397
Pages (from-to)
235-236
ISBN (electronic)
978-1-5386-4214-6
Event
2018 Symposia on VLSI Technology and Circuits (2018-06-18 - 2018-06-22), Hilton Hawaiian Village, Honolulu, United States
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Abstract

This paper presents a class-AB driver for high-fidelity audio. It attains high-linearity at low-power by using an improved output stage biasing technique and a new frequency compensation scheme. Designed in standard 65nm CMOS, the driver delivers 5I.2mW peak power to 16Ω 0.33nF load, while consuming 0.97mW. It achieves -101.4dB THD+N over full audio band, the lowest ever reported linearity among sub-milliwatt CMOS class-AB drivers. Compared to prior works, it has >12dB better linearity and >7x higher unity-gain bandwidth, resulting in 2.5x improvement in linearity FOM (=Peak Load Power/ (Quiescent Power × THD+N[%])).