Implementing Symbolic Controllers into FPGAs

Master Thesis (2019)
Author(s)

A.J. Rueda Arjona (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

M Mazo Jr. – Mentor (TU Delft - Team Tamas Keviczky)

M. Mazo – Graduation committee member (TU Delft - Team Tamas Keviczky)

W. Pan – Graduation committee member (TU Delft - Robot Dynamics)

Manon Kok – Graduation committee member (TU Delft - Team Jan-Willem van Wingerden)

Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright
© 2019 Antonio Rueda Arjona
More Info
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Publication Year
2019
Language
English
Copyright
© 2019 Antonio Rueda Arjona
Graduation Date
29-08-2019
Awarding Institution
Delft University of Technology
Programme
['Electrical Engineering | Embedded Systems']
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

Embedded control systems are processor-based systems that need to run an application for an extended amount of time, such as months or years. Typically, they implement a realtime function to control a system. Embedded systems are implemented using hardware and software to perform an specific task. This is why they can be optimized to reduce its size and cost and increase its reliability and performance. In embedded control systems, a discrete time embedded system is controlling a continuous time plant. In order to deal with this complex interactions, there are some tools that synthesize symbolic controllers. However,
the size of these controllers is still too large to be widely implemented in embedded systems for real-time applications. Although it is possible to implement them in CPUs with large memory, their time-step is limited by a few GHz. On the other hand, FPGAs can run at a higher frequency (MHz) but they have limited memory. In this project, we propose a tool that automate the process of compressing, determinizing and generating the necessary files to flash a symbolic controller into an FPGA. We propose three different ways of transforming the original controllers and we compare them with another similar tool from the Technische Universität München. We also simulate in real-time the controlled closed-loop of some of those symbolic controllers using a simulated plant to validate the entire process.

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