FPGA accelerated trading data compression

Master thesis (2020)

Authors

J. Chen Electrical Engineering, Mathematics and Computer Science

Contributors

Al-Ars Zaid (supervisor 1)
Fabio Sebastiano (OLD)Applied Quantum Architectures (supervisor 2)
Maurice Daverveldt Optiver (coach)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright: © 2020 J. Chen
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Published Date

26-06-2020

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science