FPGA accelerated trading data compression
Master Thesis
(2020)
Author(s)
J. Chen (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Contributor(s)
M. Zaid – Mentor
F. Sebasatiano – Graduation committee member (TU Delft - (OLD)Applied Quantum Architectures)
Peter Hofstee – Coach
Maurice Daverveldt – Coach (Optiver)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright
© 2020 J. Chen
To reference this document use:
https://resolver.tudelft.nl/uuid:29259df3-3f9b-47d4-abf3-b5ad0c564303
More Info
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Publication Year
2020
Language
English
Copyright
© 2020 J. Chen
Graduation Date
26-06-2020
Awarding Institution
Delft University of Technology
Faculty
Electrical Engineering, Mathematics and Computer Science
Reuse Rights
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