FPGA-Based Design for S-Transform-Based Fault Detection Algorithm with RTDS Integration
Y. Ye (TU Delft - Electrical Engineering, Mathematics and Computer Science)
M Popov – Mentor (TU Delft - Intelligent Electrical Power Grids)
JSSM Wong – Mentor (TU Delft - Computer Engineering)
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Abstract
With the increasing integration of renewable energy sources such as Type-3/4 wind turbines and photovoltaic systems, fault current levels in power systems have decreased, weakening the performance of traditional distance relays. To address this, the Stockwell Transform (S-Transform) based fault detection algorithm has been proposed and has proven effective in identifying fault occurrences. While previous work has implemented the S-Transform-based fault detection algorithm in the Programmable Logic (PL) of the FPGA and validated it through AMD Vivado simulation, integration into a physical FPGA board and a Real-Time Digital Simulator (RTDS) environment has not yet been achieved. This paper presents a complete hardware-software co-design in which the exiisting implementation is deployed on an FPGA board and integrated with an RTDS system. The proposed system enables real-time communication between the RTDS and the FPGA via the IEC~61850 protocol. The PL of the FPGA platform executes the fault detection algorithm, while the Processing System (PS) handles IEC~61850 protocol communication, data exchange between the PS and the PL, and interrupt handling within a bare-metal environment. Experimental results demonstrate that the entire design meets strict real-time performance and delay requirements, validating the system’s suitability for high-speed fault detection in distance protection applications.