PlasticNet
A low latency flexible network architecture for interconnected multi-FPGA systems
Carlos Salazar-Garcia (Department of Mechatronics)
Jeferson Gonzalez-Gomez (Eindhoven University of Technology)
Kaleb Alfaro-Badilla (Instituto Tecnologico de Costa Rica)
Ronny Garcia-Ramirez (Instituto Tecnologico de Costa Rica)
Renato Rimolo-Donadio (Instituto Tecnologico de Costa Rica)
Christos Strydis (Erasmus MC)
Alfonso Chacon-Rodriguez (Instituto Tecnologico de Costa Rica)
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Abstract
This paper presents preliminary results of Plastic-Net, a custom FPGA interconnect architecture designed for high-processing applications that communicate extensively among multiple FPGAs. PlasticNet allows the interconnection of processing nodes (PNs) through a flexible, reliable and efficient custom protocol, that can be easily integrated in High-Level Synthesis (HLS) modern design environments. The system is evaluated on a ZedBoard Zynq®-7000 ARM/FPGA SoC Development Board, including criteria such as overhead, area, worst-case packet delivery latency and bandwidth. The best evaluated case achieved a half-occupancy latency of 16.9μs. The results show the potential of PlasticNet as an efficient solution for low latency multi-FPGA interconnection.