PlasticNet

A low latency flexible network architecture for interconnected multi-FPGA systems

Conference Paper (2020)
Author(s)

Carlos Salazar-Garcia (Department of Mechatronics)

Jeferson Gonzalez-Gomez (Department of Mathematics and Computer Science)

Kaleb Alfaro-Badilla (Instituto Tecnologico de Costa Rica)

Ronny Garcia-Ramirez (Instituto Tecnologico de Costa Rica)

Renato Rimolo-Donadio (Instituto Tecnologico de Costa Rica)

Christos Strydis (Erasmus MC)

Alfonso Chacon-Rodriguez (Instituto Tecnologico de Costa Rica)

Affiliation
External organisation
DOI related publication
https://doi.org/10.1109/PRIME-LA47693.2020.9062749 Final published version
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Publication Year
2020
Language
English
Affiliation
External organisation
Article number
9062749
ISBN (electronic)
9781728131467
Event
3rd IEEE Conference on Ph.D. Research in Microelectronics and Electronics in Latin America, PRIME-LA 2020 (2020-02-25 - 2020-02-28), San Jose, Costa Rica
Downloads counter
176

Abstract

This paper presents preliminary results of Plastic-Net, a custom FPGA interconnect architecture designed for high-processing applications that communicate extensively among multiple FPGAs. PlasticNet allows the interconnection of processing nodes (PNs) through a flexible, reliable and efficient custom protocol, that can be easily integrated in High-Level Synthesis (HLS) modern design environments. The system is evaluated on a ZedBoard Zynq®-7000 ARM/FPGA SoC Development Board, including criteria such as overhead, area, worst-case packet delivery latency and bandwidth. The best evaluated case achieved a half-occupancy latency of 16.9μs. The results show the potential of PlasticNet as an efficient solution for low latency multi-FPGA interconnection.