Computational neuroscience relies on complex mathematical models to simulate brain activity and decipher underlying biological processes. However, these simulations are computationally intensive, prompting the exploration of high-performance computing systems as a viable solution to enhance efficiency. In this work, we introduce SimHH, an extended-Hodgkin-Huxley simulator designed for versatility and high performance. Leveraging the OpenMPI library, SimHH exhibits exceptional scalability, catering to a wide spectrum of computing environments. Scalability is optimized through two distinct configurations: one that distributes all possible cell-compartment potentials among network nodes and another that shares compartment potentials only among relevant nodes, employing MPI Allgather and Alltoall. Seamless support for CUDA, CUDA-aware MPI, and NVLink further enhances performance, with communication overhead minimized through concurrent execution of compute kernels. Benchmarking against various neuron models, including the challenging Inferior-Olivary Nucleus, demonstrates SimHH’s potential, achieving remarkable results on up to 256 compute nodes. Notably, large-scale GPU clusters enable the simulation of highly biologically plausible networks exceeding 10 million cells. Comparative analyses against CPU- and FPGA-based solutions underscore SimHH’s superiority, boasting a speedup of approximately 150× over single-threaded CPU implementations, 10×over single-FPGA setups, and 10×over multi-threaded CPU configurations with 128 threads, all for a fully connected network of approximately 7,000 IO cells. Additionally, a 7× speedup is attained compared to the established NEST neurosimulator running on 32 nodes, simulating a network of 94,720 Hodgkin-Huxley neurons with gap junctions. These findings underscore SimHH’s efficacy in advancing computational-neuroscience research by facilitating efficient and scalable simulation of complex neuronal networks.

Studying Purkinje cell activity is vital for understanding brain function and movement disorders. However, conventional wired headstage setups in mice restrict natural behavior, while transmitting full neural waveforms wirelessly is prohibitively power-intensive. This work presents a lightweight, real-time spike sorting system implemented on the EFM32PG28 microcontroller, capable of classifying complex spikes and simple spikes from Purkinje cells directly on the headstage. By extracting only relevant spike information, the system enables efficient wireless transmission or local storage. Leveraging knowledge distillation and Matrix Vector Processor (MVP) hardware acceleration, the spike sorter achieves an overall $\mathbf{F 1}$-score of 93.43% and completes detection and classification in 0.765 ms. With over 53 hours of continuous operation on a $50-\mathrm{mAh}$ battery, the proposed solution is well-suited for long-duration, untethered cerebellar experiments in freely moving mice.

Olivocerebellar learning is highly adaptable, unfolding over minutes to weeks depending on the task. However, the stabilizing mechanisms of the synaptic dynamics necessary for ongoing learning remain unclear. We constructed a model to examine plasticity dynamics under stochastic input and investigate the impact of inferior olive (IO) reverberations on Purkinje cell (PCs) activity and synaptic plasticity. We explored Upbound and Downbound cerebellar micromodules, which are organized loops of IO neurons, cerebellar nuclei neurons and microzones of PCs characterized by their unique molecular profiles and different levels of baseline firing. Our findings show synaptic weight convergence followed by stability of synaptic weights. In line with their relatively low and high intrinsic firing, we observed that Upbound and Downbound PCs have a propensity for potentiation and depression, respectively, with both PC types reaching stability at differential levels of overall strength of their parallel-fiber (PF) inputs. The oscillations and coupling of IO neurons participating in the Upbound and Downbound modules determine at which frequency band PFs can be stabilized optimally. Our results indicate that specific frequency components drive IO resonance and synchronicity, which, in turn, regulate temporal patterning across Upbound and Downbound zones, orchestrating their plasticity dynamics.

Brain modeling can occur at different levels of abstraction, each aimed at a different purpose. The Virtual Brain (TVB) is an open-source platform for constructing and simulating personalized brain-network models, favoring whole-brain macro-scales while reducing micro-level detail. Among other purposes, TVB is used to build patient-specific, digital, brain twins that can be used in different clinical settings, such as the study and treatment of epilepsy. However, fitting patient-specific TVB models requires a large number of successive and time-consuming simulations. By studying the internal structure of TVB, we observed heterogeneous computation needs in its models which could be leveraged to accelerate simulations. In this work, we designed and implemented HUMA, a heterogeneous, ultra low-latency, dataflow architecture on an AMD Versal Adaptive SoC to accelerate TVB fitting to different patient-brain makeups. Our heterogeneous solution runs about 27× faster compared to a modern-day, server-class, 32-core CPU while consuming a fraction of its power. Additionally, it delivers on average about 14× lower latency, 1.7× better power efficiency and an order-of-magnitude lower energy consumption when compared against the high-performance GPU version of TVB. The achieved latency savings reveal a significant potential in model-fitting for individual patients as well as in closed-loop biohybrid experiments.

Introduction: In 2012, potassium and sodium ion channels in Hodgkin-Huxley-based brain models were shown to exhibit memristive behavior. This positioned memristors as strong candidates for implementing biologically accurate artificial neurons. Memristor-based brain simulations offer advantages in energy efficiency, scalability, and compactness, benefiting fields such as soft robotics, embedded systems, and neuroprosthetics. Methods: Previous approaches used current-controlled Mott memristors, which poorly matched the voltage-controlled nature of ion channels. This study employs volatile, oxide-based memristors that leverage electric-field-driven oxygen-vacancy migration to emulate voltage-dependent channel behavior. We selected candidate WOx and NbOx memristors and modeled their dynamics to verify performance as Hodgkin-Huxley potassium channels. Results: The device exhibits sigmoidal gating and voltage-dependent time constants consistent with the theoretical model. By scaling the passive circuitry around the memristors, we show that they capture the essential mechanisms of potassium ion-channels, although spike height is reduced due to strong non-linear voltage-dependence. Still, by cascading multiple compartments, typical spike propagation is retained. Discussion: This is the first demonstration of a voltage-controlled memristor replicating the Hodgkin-Huxley potassium channel, validating its potential for more efficient brain simulation hardware.

Computational-neuroscience research is increasingly in need of larger, biophysically realistic brain models. These analog-in-nature models build upon the Hodgkin-Huxley (HH) formalism and are run on digital, high-performance computing systems making simulation very computationally expensive. In circuit form, these models are theoretically suitable for efficient analog implementation. However, the ion-channel components –predominantly, sodium and potassium– are nonlinear, time-varying resistors, lacking an efficient implementation. Chua et al. proved that these ion-channel models are in fact memristors –devices with a conductance as a function of applied-voltage history– claiming that “memristors are the right stuff for building brains”. However, the kind of actual memristor implementation that is the right one for building brains is not defined. In this article, the device class and characteristics of such memristors are defined and existing memristive implementations of HH-like designs are then reviewed. Surprisingly, although often misclassified as such, no physical implementation currently exists that replicates the original HH equations faithfully or efficiently. Having put forward the desired memristor properties, a design guide for screening suitable memristor designs is then proposed. Screening the existing literature reveals that suitable devices likely already exist for potassium ion-channel emulation, while none exists for sodium; this calls for further investigation of higher-order, voltage-controlled and volatile memristors.

Computational-neuroscience simulators have traditionally been constrained by tightly coupled simulation engines and modeling languages, limiting their flexibility and scalability. Retrofitting these platforms to accommodate new backends is often costly, and sharing models across simulators remains cumbersome. This paper puts forward an alternative approach based on the EDEN neural simulator, which introduces a modular stack that decouples abstract model descriptions from execution. This architecture enhances flexibility and extensibility by enabling seamless integration of multiple backends, including hardware accelerators, without extensive reprogramming. Through the use of NeuroML, simulation developers can focus on high-performance execution, while model users benefit from improved portability without the need to implement custom simulation engines. Additionally, the proposed method for incorporating arbitrary simulation platforms—from model-optimized code kernels to custom hardware devices—as backends offers a more sustainable and adaptable framework for the computational-neuroscience community. The effectiveness of EDEN's approach is demonstrated by integrating two distinct backends: flexHH, an FPGA-based accelerator for extended Hodgkin-Huxley networks, and SpiNNaker, the well-known, neuromorphic platform for large-scale spiking neural networks. Experimental results show that EDEN integrates the different backends with minimal effort while maintaining competitive performance, reaffirming it as a robust, extensible platform that advances the design paradigm for neural simulators by achieving high generality, performance, and usability.

The investigation of neural activity in the murine brain through electrophysiological recordings stands as a fun-damental pursuit within the domain of neuroscience. A specific area of keen interest within this field pertains to the scrutiny of Purkinje cells, nestled within the cerebellum, in order to gain insights into the mechanisms underlying brain injuries and the impairment of motor functions. Notably, Purkinje cells manifest two distinct types of spikes - complex and simple - a pivotal aspect for subsequent classification purposes. However, a critical challenge has persisted in the experimental paradigm: the prevailing setups necessitate the use of wired connections linking the mouse's head stage to data acquisition systems. This constraint substantially curtails the mouse's natural behavior during the course of experimentation, limiting the ability to study essential neural processes and motor function aspects over extended periods. In this paper, we propose a new architectural framework for the detection and classification of neuronal spikes originating from Purkinje cells. This system is engineered to exploit the distinct attributes of these neural entities, effectively winnowing out extraneous data while retaining the pertinent information. The resultant output is a refined dataset, amenable to convenient storage within the mouse's head stage, obviating the need for unwieldy wiring configurations. Our proposed implementation attains a classification accuracy of up to 98% on an in-vivo dataset. Furthermore, its compact form factor en-sures unhindered mobility for the experimental mouse, fostering naturalistic behaviors during the course of scientific inquiry.

In recent years, significant strides in Artificial Intelligence (AI) have led to various practical applications, primarily centered around training and deployment of deep neural networks (DNNs). These applications, however, require considerable computational resources, predominantly reliant on modern Graphics-Processing Units (GPUs). Yet, the quest for larger and faster DNNs has spurred the creation of specialized AI chips and efficient Machine-Learning (ML) software tools like TensorFlow and PyTorch have been developed for striking a balance between usability and performance. Simultaneously, the field of computational neuroscience shares a similar quest for increased computational power to simulate more extensive and detailed brain models, while also keeping usability high. Although GPUs have also entered this field, programming complexity remains high, resulting in cumbersome simulations. Inspired by AI progress, we introduce a workflow for easily accelerating brain simulations using TensorFlow and evaluate the performance of various, cutting-edge AI chips – including the Graphcore Intelligence-Processing Unit (IPU), GroqChip, Nvidia GPU with Tensor Cores, and Google Tensor-Processing Unit (TPU) – when simulating a biologically detailed as well as simpler brain models. Our model simulations explore the architectural tradeoffs of a modern-day CPU and these four AI platforms by varying computational density, memory requirements and floating-point numerical accuracy. Results show that the GroqChip achieves the best performance for small networks, yet is unable to simulate large-scale networks. At the scale of mammalian brains, the GPU, IPU and TPU achieve speedups ranging from 29x to 1,208x times over CPU runtimes. Remarkably, the TPU sets a new record for the largest, real-time simulation of the inferior-olivary nucleus in the brain. Reduced-accuracy floating-point implementations make some simulation results unreliable for brain research, notably for the GroqChip. Consequently, this work underscores the potential of ML libraries for accelerating brain simulations as well as the critical role of AI-chip numerical accuracy for biophysically realistic brain models.

In recent decades, increasing ultrasound frame rates has been the main motivation behind many novel ultrasound imaging applications [1]-[3]. With this work, we propose an efficient ultrafast FPGA beamformer that applies coherent compounding, through a delay-reuse optimization.

Four-dimensional ultrasound imaging of complex biological systems such as the brain is technically challenging because of the spatiotemporal sampling requirements. We present computational ultrasound imaging (cUSi), an imaging method that uses complex ultrasound fields that can be generated with simple hardware and a physical wave prediction model to alleviate the sampling constraints. cUSi allows for high-resolution four-dimensional imaging of brain hemodynamics in awake and anesthetized mice.

IntroductionIn-silico simulations are a powerful tool in modern neuroscience for enhancing our understanding of complex brain systems at various physiological levels. To model biologically realistic and detailed systems, an ideal simulation platform must possess: (1) high performance and performance scalability, (2) flexibility, and (3) ease of use for non-technical users. However, most existing platforms and libraries do not meet all three criteria, particularly for complex models such as the Hodgkin-Huxley (HH) model or for complex neuron-connectivity modeling such as gap junctions.MethodsThis work introduces ExaFlexHH, an exascale-ready, flexible library for simulating HH models on multi-FPGA platforms. Utilizing FPGA-based Data-Flow Engines (DFEs) and the dataflow programming paradigm, ExaFlexHH addresses all three requirements. The library is also parameterizable and compliant with NeuroML, a prominent brain-description language in computational neuroscience. We demonstrate the performance scalability of the platform by implementing a highly demanding extended-Hodgkin-Huxley (eHH) model of the Inferior Olive using ExaFlexHH.ResultsModel simulation results show linear scalability for unconnected networks and near-linear scalability for networks with complex synaptic plasticity, with a 1.99 × performance increase using two FPGAs compared to a single FPGA simulation, and 7.96 × when using eight FPGAs in a scalable ring topology. Notably, our results also reveal consistent performance efficiency in GFLOPS per watt, further facilitating exascale-ready computing speeds and pushing the boundaries of future brain-simulation platforms.DiscussionThe ExaFlexHH library shows superior resource efficiency, quantified in FLOPS per hardware resources, benchmarked against other competitive FPGA-based brain simulation implementations.

Objectives: Current techniques in brain stimulation are still largely based on a phrenologic approach that a single brain target can treat a brain disorder. Nevertheless, meta-analyses of brain implants indicate an overall success rate of 50% improvement in 50% of patients, irrespective of the brain-related disorder. Thus, there is still a large margin for improvement. The goal of this manuscript is to 1) develop a general theoretical framework of brain functioning that is amenable to surgical neuromodulation, and 2) describe the engineering requirements of the next generation of implantable brain stimulators that follow from this theoretic model. Materials and Methods: A neuroscience and engineering literature review was performed to develop a universal theoretical model of brain functioning and dysfunctioning amenable to surgical neuromodulation. Results: Even though a single target can modulate an entire network, research in network science reveals that many brain disorders are the consequence of maladaptive interactions among multiple networks rather than a single network. Consequently, targeting the main connector hubs of those multiple interacting networks involved in a brain disorder is theoretically more beneficial. We, thus, envision next-generation network implants that will rely on distributed, multisite neuromodulation targeting correlated and anticorrelated interacting brain networks, juxtaposing alternative implant configurations, and finally providing solid recommendations for the realization of such implants. In doing so, this study pinpoints the potential shortcomings of other similar efforts in the field, which somehow fall short of the requirements. Conclusion: The concept of network stimulation holds great promise as a universal approach for treating neurologic and psychiatric disorders.

The cloud has become a powerful and useful environment for the deployment of High-Performance Computing (HPC) applications, but the large number of available instance types poses a challenge in selecting the optimal platform. Users often do not have the time or knowledge necessary to make an optimal choice. Recommender systems have been developed for this purpose but current state-of-the-art systems either require large amounts of training data, or require running the application multiple times; this is costly. In this work, we propose Oikonomos-II, a resource-recommendation system based on reinforcement learning for HPC applications in the cloud. Oikonomos-II models the relationship between different input parameters, instance types, and execution times. The system does not require any preexisting training data or repeated job executions, as it gathers its own training data opportunistically using user-submitted jobs, employing a variant of the Neural-LinUCB algorithm. When deployed on a mix of HPC applications, Oikonomos-II quickly converged towards an optimal policy. The system eliminates the need for preexisting training data or auxiliary runs, providing an economical, general-purpose, resource-recommendation system for cloud HPC.

Timely detection of cardiac arrhythmia characterized by abnormal heartbeats can help in the early diagnosis and treatment of cardiovascular diseases. Wearable healthcare devices typically use neural networks to provide the most convenient way of continuously monitoring heart activity for arrhythmia detection. However, it is challenging to achieve high accuracy and energy efficiency in these smart wearable healthcare devices. In this work, we provide architecture-level solutions to deploy neural networks for cardiac arrhythmia classification. We have created a hierarchical structure after analyzing various neural network topologies where only required network components are activated to improve energy efficiency while maintaining high accuracy. In our proposed architecture, we introduce a severity-based classification approach to directly help the users of the wearable healthcare device as well as the medical professionals. Additionally, we have employed computation-in-memory based hardware to improve energy efficiency and area consumption by leveraging in-situ data processing and scalability of emerging memory technologies such as resistive random access memory (RRAM). Simulation experiments conducted using the MIT-BIH arrhythmia dataset show that the proposed architecture provides high accuracy while consuming average energy of 0.11 $\mu$J per heartbeat classification and 0.11 mm2 area, thereby achieving 25× improvement in average energy consumption and 12× improvement in area compared to the state-of-the-art.

Next-generation personalized healthcare devices are undergoing extreme miniaturization in order to improve user acceptability. However, such developments make it difficult to incorporate cryptographic primitives using available target tech-nologies since these algorithms are notorious for their energy consumption. Besides, strengthening these schemes against side-channel attacks further adds to the device overheads. Therefore, viable alternatives among emerging technologies are being sought. In this work, we investigate the possibility of using memristors for implementing lightweight encryption. We propose a 40-nm RRAM-based GIFT-cipher implementation using a 1TIR configuration with promising results; it exhibits roughly half the energy consumption of a CMOS-only implementation. More importantly, its non-volatile and reconfigurable substitution boxes offer an energy-efficient protection mechanism against side-channel attacks. The complete cipher takes 0.0034 mm2of area, and encrypting a 128-bit block consumes a mere 242 pJ.

The cloud has become a powerful environment for deploying High-Performance Computing (HPC) applications. However, the size and heterogeneity of cloud-hardware offerings poses a challenge in selecting the optimal cloud instance type. Users often lack the knowledge or time necessary to make an optimal choice. In this work, we propose Oikonomos, a data-driven, opportunistic, resource-recommendation system for HPC applications in the cloud. Oikonomos trains a Multi-layer Perceptron (MLP) to predict the performance of a given HPC application, for different input parameters and instance types. It, then, calculates the cost of executing the application on different instance types and proposes the one best-fitting the user's needs. We deployed Oikonomos on a diverse mix of HPC workloads, and found that for all applications, it approached an optimal policy. The optimal instance type was chosen in 90% of the cases for seven out of eight applications, scoring a Mean Absolute Percentage Error (MAPE) consistently below 20%. This demonstrated that Oikonomos can provide a practical, general-purpose, resource-recommendation system for cloud HPC.

-The development of multi-FPGA systems focused on high-performance computing requires high-speed channels, low bandwidth overhead and latency. In this paper, we propose a multi-FPGA interconnection framework aimed at distributed processing applications. Our solution allows efficient communication between different processing elements distributed among the FPGAs. To evaluate our proposal, we built a multi-FPGA system composed of five Zynq ZC706 FPGA boards capable of hosting a diverse number of coprocessors distributed over our custom network. With an aggregate bandwidth of up to 25Gbps per FPGA board, the interconnection framework reaches a latency of only 200.36ns, one of the lowest reported in the lElectronics Engineering, iterature. Experimental results show a computational efficiency of 97.25 % with a sustained throughput of 21.4GFLOPS. Furthermore, the proposed network interconnection architecture is easily portable to the latest generation FPGAs. This makes the current proposal a competitive option for distributed processing in multi-FPGA systems.

Neural activity exhibits oscillations, bursts, and resonance, enhancing responsiveness at preferential frequencies. For example, theta-frequency bursting and resonance in granule cells facilitate synaptic transmission and plasticity mechanisms at the input stage of the cerebellar cortex. However, whether theta-frequency bursting of Purkinje cells is involved in generating rhythmic behavior has remained neglected. We recorded and optogenetically modulated the simple and complex spike activity of Purkinje cells while monitoring whisker movements with a high-speed camera of awake, head-fixed mice. During spontaneous whisking, both simple spike activity and whisker movement exhibit peaks within the theta band. Eliciting either simple or complex spikes at frequencies ranging from 0.5 to 28 Hz, we found that 8 Hz is the preferred frequency around which the largest movement is induced. Interestingly, oscillatory whisker movements at 8 Hz were also generated when simple spike bursting was induced at 2 and 4 Hz, but never via climbing fiber stimulation. These results indicate that 8 Hz is the resonant frequency at which the cerebellar-whisker circuitry produces rhythmic whisking.

A Medical Body Area Network (MBAN) is an ensemble of collaborating, potentially heterogeneous, medical devices located inside, on the surface of or around the human body with the objective of tackling one or multiple medical conditions of the MBAN host. These devices-which are a special category of Wireless Body Area Networks (WBANs)–collect, process and transfer medical data outside of the network, while in some cases they also administer medical treatment autonomously. Since communication is so pivotal to their operation, the newfangled IEEE 802.15.6 standard is aimed at the communication aspects of WBANs. It places a set of physical and communication constraints while it also includes association/disassociation protocols and security services that WBAN applications need to comply with. However, the security specifications put forward by the standard can be easily shown to be insufficient when considering realistic MBAN use cases and need further enhancements. The present work addresses these shortcomings by, first, providing a structured analysis of the IEEE 802.15.6 security features and, afterwards, proposing comprehensive and tangible recommendations on improving the standard’s security.