Introduction: In 2012, potassium and sodium ion channels in Hodgkin-Huxley-based brain models were shown to exhibit memristive behavior. This positioned memristors as strong candidates for implementing biologically accurate artificial neurons. Memristor-based brain simulations offer advantages in energy efficiency, scalability, and compactness, benefiting fields such as soft robotics, embedded systems, and neuroprosthetics. Methods: Previous approaches used current-controlled Mott memristors, which poorly matched the voltage-controlled nature of ion channels. This study employs volatile, oxide-based memristors that leverage electric-field-driven oxygen-vacancy migration to emulate voltage-dependent channel behavior. We selected candidate WOx and NbOx memristors and modeled their dynamics to verify performance as Hodgkin-Huxley potassium channels. Results: The device exhibits sigmoidal gating and voltage-dependent time constants consistent with the theoretical model. By scaling the passive circuitry around the memristors, we show that they capture the essential mechanisms of potassium ion-channels, although spike height is reduced due to strong non-linear voltage-dependence. Still, by cascading multiple compartments, typical spike propagation is retained. Discussion: This is the first demonstration of a voltage-controlled memristor replicating the Hodgkin-Huxley potassium channel, validating its potential for more efficient brain simulation hardware.

Computational-neuroscience research is increasingly in need of larger, biophysically realistic brain models. These analog-in-nature models build upon the Hodgkin-Huxley (HH) formalism and are run on digital, high-performance computing systems making simulation very computationally expensive. In circuit form, these models are theoretically suitable for efficient analog implementation. However, the ion-channel components –predominantly, sodium and potassium– are nonlinear, time-varying resistors, lacking an efficient implementation. Chua et al. proved that these ion-channel models are in fact memristors –devices with a conductance as a function of applied-voltage history– claiming that “memristors are the right stuff for building brains”. However, the kind of actual memristor implementation that is the right one for building brains is not defined. In this article, the device class and characteristics of such memristors are defined and existing memristive implementations of HH-like designs are then reviewed. Surprisingly, although often misclassified as such, no physical implementation currently exists that replicates the original HH equations faithfully or efficiently. Having put forward the desired memristor properties, a design guide for screening suitable memristor designs is then proposed. Screening the existing literature reveals that suitable devices likely already exist for potassium ion-channel emulation, while none exists for sodium; this calls for further investigation of higher-order, voltage-controlled and volatile memristors.

Memristor technology has shown great promise for energy-efficient computing [1] , though it is still facing many challenges [1 , 2]. For instance, the required additional costly electroforming to establish conductive pathways is seen as a significant drawback as it contributes to power and area overheads, and limited device endurance. In this work, we propose a novel forming-free HfO₂ -based ReRAM device with low operating voltages , multi-level capability , and less sensitivity to device-to-device (D2D) and cycle-to-cycle (C2C) variations. The device is fabricated using CMOS-compatible processes, excluding the undesirable complex steps mandatory to manufacture the state-of-the-art forming-free devices [3, 4, 5]. This is accomplished by utilizing the desirable formation energy of Pd-O bonds [6, 7], which creates conducting paths at room temperature while maintaining the analog switching ability of the devices. The proposed ReRAM device holds a great value for dense memories and energy-efficient compute architectures.

In recent years, there has been a growing interest in investigating the potential of emerging memristor (MR) devices for gas sensing applications, particularly at room temperature. This article reports on a planar Au/reduced graphene oxide (rGO)/Au memristive hydrogen sensor, fabricated on a cost-effective cyclic olefin copolymer (COC) substrate, and utilizing the rGO green carbon material as its active sensing element. The sensor's performance is evaluated using two different testing modes: conventional chemiresistive testing under a constant voltage bias (CVB) and voltage pulse (VP) modes. The CVB mode demonstrates high repeatability, selectivity, response time, and recovery time, indicating the sensor's reliable gas sensing capabilities. In addition, the VP mode significantly enhances the sensor's relative percentage response, indicating its potential for improved gas sensing performance. To optimize the sensor's response, the impact of hydrogen exposure on the MR resistive switching is studied, revealing that the effect is contingent on the VP amplitude. Specifically, gas-enhanced resistive switching is achieved at lower voltage levels, whereas at higher voltage levels, gas exposure slows down the rate of resistive switching. Consequently, voltage-pulse testing is conducted at two voltage magnitudes, low (2.5 V) and high (4.5 V), and the sensor's response is enhanced from 0.5% under CVB mode to 786% under VP mode.

Environmentally friendly humidity sensors with high sensing performance are considered crucial components for various wearable electronic devices. We developed a rapid-response and durable Paper Cellulose Fiber/Graphene Oxide Matrix (PCFGOM) humidity sensor using an all-carbon functional material. The fabricated sensor demonstrated a high sensitivity to humidity through an electrical impedance measurement, with an increase in response to humidity ranging from 10% to 90% at 1 kHz and 10 kHz, respectively, along with a response time of 1.2 s and a recovery time of 0.8 s. The stability of the sensor was also examined, with consistent performance over a period of 24 h. This novel sensor was employed in several applications, including non-contact proximity sensing, environmental humidity detection, and human respiration detection, to showcase its potential. Moreover, this work represents a significant milestone in developing inexpensive and eco-friendly humidity sensors, given the abundance of paper and graphene in nature and their biocompatibility.

Advances in materials science and memory devices work in tandem for the evolution of Artificial Intelligence systems. Energy-efficient computation is the ultimate goal of emerging memristor technology, in which the storage and computation can be done in the same memory crossbar. In this work, an analog memristor device is fabricated utilizing the unique characteristics of single-wall carbon nanotubes (SWCNTs) to act as the switching medium of the device. Via the planar structure, the memristor device exhibits analog switching ability with high state stability. The device’s conductance and capacitance can be tuned simultaneously, increasing the device's potential and broadening its applications' horizons. The multi-state storage capability and long-term memory are the key factors that make the device a promising candidate for bio-inspired computing applications. As a demonstrator, the fabricated memristor is deployed in spiking neural networks (SNN) to exploit its analog switching feature for energy-efficient classification operation. Results reveal that the computation-in-memory implementation performs Vector Matrix Multiplication with 95% inference accuracy and few femtojoules per spike energy efficiency. The memristor device presented in this work opens new insights towards utilizing the outstanding features of SWCNTs for efficient analog computation in deep learning systems.

Due to their stability, single-walled carbon nanotubes (SWCNTs) have been used for multiple applications in the semiconductor industry. Herein, we report the humidity sensing capability of SWCNTs by comparing the different densities of SWCNTs dispersed on the sensing area of the planner sensor device. Three different humidity sensors have been fabricated by preparing three different densities of CNTs diluted in deionized water and drop cast on the channel of 100 μm width between 2mm x 1mm gold electrodes. It is observed that for very low density and high density of SWCNTs sensing layer, the sensing behavior either lacks in the detection range and response time, respectively. However, we found the optimized density of SWCNTs in deionized water for a highly sensitive, fast, and high-range humidity sensor for the optimized density of SWCNTs in deionized water.

Recently, phase change chalcogenides, such as monochalcogenides, are reported as switching materials for conduction-bridge-based memristors. However, the switching mechanism focused on the formation and rupture of an Ag filament during the SET and RESET, neglecting the contributions of the phase change phenomenon and the distribution and re-distribution of germanium vacancies defects. The different thicknesses of germanium telluride (GeTe)-based Ag/GeTe/Pt devices are investigated and the effectiveness of phase loops and defect loops future application in neuromorphic computing are explored. GeTe-based devices with thicknesses of 70, 100, and 200 nm, are fabricated and their electrical characteristics are investigated. Highly reproducible phase change and defect-based characteristics for a 100 nm-thick GeTe device are obtained. However, 70 and 200 nm-thick devices are unfavorable for the reliable memory characteristics. Upon further analysis of the Ag/GeTe/Pt device with 100 nm of GeTe, it is discovered that a state-of-the-art dependency of phase loops and defect loops exists on the starting and stopping voltage sweeps applied on the top Ag electrode. These findings allow for a deeper understanding of the switching mechanism of monochalcogenide-based conduction-bridge memristors.

Recently, Memristor (MR) device has received much attention in many applications, including memory, computing, neuromorphic, sensing, and security. Electrical characterization and testing of MR are among the main challenges facing MR technology. Available MR characterization tools are costly and bulky, limiting the research contributions in this field to big institutions. Furthermore, there is a need for a portable testing platform that provides the means to extract MR parameters, mainly when used in sensing or security applications. This work proposes a novel power-efficient, cost-effective, lightweight, and automated Arduino-based MR characterization platform named MemChar. A detailed circuit and system implementation of MemChar are presented. MemChar functionality results are compared to industry-standard device parameter analyzer tools, i.e., Keithley 4200A, with excellent correlation. MemChar is an easy-to-implement and user-friendly platform that provides a significant milestone toward utilizing MR devices in mobile, IoT, and sensing applications.

This work presents a novel planar memimpedance device, named AMemImp, that consists of a Silver/reduced Graphene Oxide/Silver junction. AMemImp exhibits a unique ability for analog memimpedance tuning. For the first time in the literature, it is shown that the resistance and the capacitance of AMemImp device can be tuned simultaneously using a suitable voltage pulse. The oxide gap size (the distance between the metal electrodes) effect on both resistance and capacitance is also studied. It is proved that AMemImp capacitance follows semiconductors-based capacitance behavior during full ON state, while it has the insulator-based parallel plate capacitance characteristics during full OFF state. As a demonstrator, the analog capacitance switching behavior of AMemImp is utilized to build 2 capacitors and 2 transistors (2C2T) computation cell to perform multiply-and-accumulate operation. The non-volatile memcapacitor is exploited to store the data during the programming mode and perform multiplication in the computation mode. The 2C2T is used in a 5x4 crossbar where 20 operations are achieved in a single clock cycle with an error of 5.7%. AMemImp is considered great merit for tunable memory, computing, and RF systems.

In this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs.

Physical unclonable functions (PUF) are cryptographic primitives employed to generate true and intrinsic randomness which is critical for cryptographic and secure applications. Thus, the PUF output (response) has properties that can be utilized in building a true random number generator (TRNG) for security applications. The most popular PUF architectures are transistor-based and they focus on exploiting the uncontrollable process variations in conventional CMOS fabrication technology. Recent development in emerging technology such as memristor-based models provides an opportunity to achieve a robust and lightweight PUF architecture. Memristor-based PUF has proven to be more resilient to attacks such as hardware reverse engineering attacks. In this paper, we design a lightweight and low-cost memristor PUF and verify it against cryptographic randomness tests achieving a unique, reliable, irreversible random sequence output. The current research demonstrates the architecture of a low-cost, high endurance Cu/HfO₂/ p^{+ +}Si memristor-based PUF (MR-PUF) which is compatible with advanced CMOS technologies. This paper explores the 15 NIST cryptographic randomness tests that have been applied to our Cu/HfO₂/ p^{+ +}Si MR-PUF. Moreover, security properties such as uniformity, uniqueness, and repeatability of our MR-PUF have been tested in this paper and validated. Additionally, this paper explores the applicability of our MR-PUF on block ciphers to improve the randomness achieved within the encryption process. Our MR-PUF has been used on block ciphers to construct a TRNG cipher block that successfully passed the NIST tests. Additionally, this paper investigated MR-PUF within a new authenticated key exchange and mutual authentication protocol between the head-end system (HES) and smart meters (SM)s in an advanced metering infrastructure (AMI) for smartgrids. The authenticated key exchange protocol utilized within the AMI was verified in this paper to meet the essential security when it comes to randomness by successfully passing the NIST tests without a post-processing algorithm.

Tunable electronics are of great potential for intelligent, adaptable systems. Memristors and memcapacitors have been extensively investigated recently as low power, high density, and high-speed elements to provide tunable-state needed by many emerging applications. Examples of such systems are tunable filters, tunable antennas, multi-level memory, and computing components. This work reports on a novel tunable analog memimpedance device. For the first time, it is proved that analog change in both resistance and capacitance can be achieved simultaneously in the same metal–semiconductor-metal structure. The novel planar geometry device consists of silver-reduced graphene oxide-silver. The multistate memimpedance behavior is observed and investigated for different oxide widths and the results confirmed the scaling of the device capacitance accordingly. Detailed study based on experimental findings shows that the capacitance of the novel system presented in this work follows n-type MOS capacitance behavior. The device is fabricated on a flexible substrate which extends its value to be deployable in smart wearable devices, in addition to its compatibility with CMOS Technology.

This study presents a novel hybrid memristor (MR)-complementary metal-oxide-semiconductor-based flash analogue-to-digital converter (ADC). The speed and efficiency of the ADC are important aspects that can significantly affect the overall system performance. The flash ADC is considered the fastest type of ADCs; however, its performance is affected by the resistor mismatch. The proposed flash ADC is the first to use tunable MR to replace conventional resistor to generate accurate reference voltages. This is achieved by utilising the highly analogue behaviour observed in multi-state MR devices fabricated and tested by the authors' group. The electrical parameters of the devices have been extracted by device characterisation, then the voltage-threshold adaptive model (VTEAM) has been used to develop a correlated mathematical and Simulation Program with Integrated Circuit Emphasis (SPICE) device model. The proposed MR-based flash-ADC design solves the issue of resistor mismatch that results in encoding errors by the ability to tune the MR resistance value post-processing. Moreover, being a nanoscale component, the usage of MR significantly improves the area efficiency of the target ADC. Furthermore, the proposed design has improved the ADC transfer function characteristic and has lower differential non-linearity and integral non-linearity errors compared with the conventional design.

In this chapter, the geometric scaling effect is investigated on the unipolar switching behavior of nano-thick Pd(TE)/Hf (capping)/HfO₂/Pd(BE) metal-insulator-metal memristive devices. The electrical I–V characteristics of such device are studied as a function of the active area and thickness of each of the metal-oxide film and the capping layer. The device active area is shown to play a critical role in dictating the magnitude of the threshold turn-on voltage (V _ON). For (Hf-7 nm/HfO₂-10 nm) stack particularly, it is found that the average V _ON decreases from 4.7 to 2.8 V when the active area increases from 50 × 50 to 200 × 200 µm². Beyond this size, the threshold V _ON saturates and the device active area have a minimal effect on V _ON. Also, the switching ON voltage increases when the capping layer thickness increases as it adds to the total active film of the device. For the fabricated devices, decreasing the oxide thickness from 10-nm to 5-nm reduces the average turn-on voltage by 21-to-27% for 50 × 50-to-400 × 400 µm² active area range, demonstrating an improvement in the threshold power consumption of the memristor. These findings can be used to guide the design and fabrication of memristors for an improved RRAM and memristive-based applications.

The first physical demonstration of a non-volatile resistive-switching memory based on the nanostructured Pt/TiO₂/Pt metal/insulator/metal stack from HP, has spurred the scientific community to develop memristive devices for a wide variety of applications. Owing to low-power and ultra-fast switching capabilities, memristors with nanoscale thickness geometry have been extensively investigated as potential replacements for flash memory technology in simple analog- and digital- computing applications. In Addition, both scalability and interconnectivity of memristors, through brain-inspired computing, have sparked a considerable move toward advancing of next-generation intelligent computing systems. On the horizon, other potential uses of the memristor have also emerged, particularly in sensing where attractive measurable changes in the I–V fingerprint of some device configurations have been demonstrated under certain types of extrinsic disturbances. Additionally, the unique and chaotic I–V response of some memristors opens the door for potential applications in hardware security. This chapter reports on novel approaches to utilize the electrical characteristics of the fabricated memristive devices for radiation sensing and security applications.

This chapter presents a physics-based mathematical model for anionic memristor devices. The model utilizes Poisson Boltzmann equation to account for temperature effect on device potential at equilibrium and comprehends material effect on device behaviors. A detailed MATLAB-based algorithm is developed to clarify and simplify the simulation environment. Moreover, the provided model is used to simulate and predict the effect of oxide thickness, material type, and operating temperatures on the electrical characteristics of the device. The value of this contribution is to provide a framework intended to simulate anionic memristor devices using correlated mathematical models. In addition, the model can be used to explore device materials and predict its performance.