R. Ishihara
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Sub-100-μV Cryogenic Biasing with Low-Noise Multilevel Memristors
Pt-Interface Tuning for Scalable Qubit Control
We demonstrate Pt/HfO2/Pt/Ti/Pt memristors enabling sub-100 μV cryogenic biasing for scalable qubit control. Compared with pure Pt-based stacks, the Pt-interface-engineered lowers the effective barrier by approximately 0.3 eV, achieving bipolar switching, read-noise ≤0.32% at approximately 4.0 K. Monte-Carlo analysis confirms bias resolution < 100 μV in a six-device programmable-gain amplifier (PGA), validating that interface-engineer can path the way for cryogenic memristors-based wiring bottleneck compared with Au/Pt-based memristors for cryo-compatible analog memory applications.
Superconducting nanowire single-photon detectors (SNSPDs) have emerged as leading cryogenic photon detectors, thanks to their high detection efficiency and low jitter. However, their large-scale integration remains limited by the wiring bottleneck between the cryogenic detectors and their room-temperature readout electronics. In applications such as color-center-based quantum computers (QCs), thousands of detectors may need to operate in parallel within a limited cryogenic cooling budget, thus asking for a scalable, low-power cryogenic electronic readout. To address these needs, this work introduces a cryogenic readout circuit directly wire-bonded to the SNSPD and using a high-impedance input to maximize the quality of the detector signal, thus relaxing the requirement of the cascaded amplifier and reducing its power consumption. An active quenching circuit is then adopted to ensure a reliable reset after the latching of the detector induced by such high input impedance. Implemented in 40-nm CMOS with an active area of <0.14 mm2, the system achieves competitive performance at 0.1 K, delivering low timing jitter (<40 ps), high speed (dead time of ≈5 ns), and dark count rates (DCRs) below 1 Hz, while achieving a 5× reduction in power consumption (down to 20 μW) with respect to the cryogenic-readout state-of-the-art. Its ultralow-power operation and compact footprint make the proposed solution well-suited for integration within large-scale quantum-computing architectures.
The direct bonding process of a diamond-on-insulator (DOI) substrate enables monolithic integration of diamond photonic structures for quantum computing by improving photon collection efficiency and entanglement generation rate between emitters. It also addresses key fabrication challenges, such as robustness, bonding strength, and scalability. This study investigates strain effects in DOI substrates following direct bonding. Strain generation is expected near the diamond–SiO2/Si interface due to the thermal expansion coefficient mismatch between the bonded materials. Strain-induced lattice distortions are characterized using nitrogen-vacancy (NV) centers in diamond via optically detected magnetic resonance (ODMR) and photoluminescence (PL) mapping. PL mapping reveals interference fringes in unbonded regions, indicating bonding irregularities. Depth-resolved ODMR measurements show a volumetric strain component increase of ≈0.45 MHz and a shear component increase of ≈0.71 MHz between the top surface and the DOI interface. However, ODMR signal contrast and peak linewidth remain largely unaffected, suggesting no visible deterioration in the optical properties of the emitters. By combining ODMR and PL mapping, this work establishes a robust methodology for assessing bonding quality and strain impact on NV centers, an essential step toward advancing scalable quantum technologies and integrated photonic circuits.
PdNeuRAM
Forming-free, multi-bit Pd/HfO2 ReRAM for energy-efficient neuromorphic computing
This paper presents a scalable cryogenic readout solution for Superconducting Nanowire Single-Photon Detectors (SNSPDs) tailored for the readout of color-center-based qubits. The readout circuit, wire-bonded directly to the SNSPD, utilizes high input impedance to boost the signal amplitude, hence reducing the power consumption, and active quenching to prevent the latching induced by the high impedance. Fabricated in 40-nm CMOS in a 0.14-mm 2 active area, the proposed system demonstrates competitive performance at 0.1 K, featuring low jitter [<60 ps Full Width at Half Maximum (FWHM)], high speed (dead time ≈ 5 ns) and low dark count rate (<1 Hz), while dissipating only 20 μ W. Such an ultra-low power and compact area enables the readout integration within a large-scale colorcenter quantum computer.
Diamond has emerged as a leading material for solid-state spin quantum systems and extreme environment electronics. However, a major limitation is that most diamond devices and structures are fabricated using bulk diamond plates. The absence of a suitable diamond-on-insulator (DOI) substrate hinders the advanced nanofabrication of diamond quantum and electronic devices, posing a significant roadblock to large-scale, on-chip diamond quantum photonics and electronics systems. In this work, we demonstrate the direct bonding of (100) single-crystal diamond plates to PECVD-grown SiO2/Si substrates at low temperatures and atmospheric conditions. The surfaces of the SiO2 and diamond plates are then activated using oxygen plasma and Piranha solution, respectively. Bonding occurs when the substrates are brought into contact with water in between and annealed at 200 °C under atmospheric conditions, resulting in a DOI substrate. We systematically studied the influence of Piranha solution treatment time and diamond surface roughness on the shear strength of the bonded substrate, devising an optimal bonding process that achieves a high yield rate of 90% and a maximum shear strength of 9.6 MPa. X-ray photoelectron spectroscopy was used for quantitative analysis of the surface chemicals at the bonding interface. It appears that the amount of -OH bindings increases with the initial roughness of the diamond, facilitating the strong bonding with SiO2. This direct bonding method will pave the way for scalable manufacturing of diamond nanophotonic devices and enable large-scale integration of diamond quantum and electronic systems.
Low-loss visible-light photonic circuits are crucial for high-performance photonic quantum processors. By using aluminum oxide (Al2O3) for its low visible-light absorption, we achieved waveguides exhibiting an exceptionally low propagation loss (1.39 dB/cm for the transverse electric mode) at red-light wavelengths. Directional coupler beam splitters fabricated using this platform exhibited good controllability of the optical splitting ratios. Furthermore, we fabricated a half beam splitter, which is an essential component of entangled photon generation in quantum optics. These results represent a significant advance toward developing low-loss photonic circuits, paving the way for improved performance in photonic quantum processors.
We demonstrate interface-enhanced memristors (OxReRAM) tailored for cryogenic spin-qubit control. By engineering a sparse filament network, our devices achieve eight nonvolatile resistance levels with an ultra-low read noise rate of around 0.3 %. When embedded in a cryogenic gain stage with RL = 30 kΩ and Vin = 0.3 V, it will deliver a ±1 V output range and sub-100-μV resolution using only six memristors per channel. This single-line biasing architecture will reduce wires, paving the way for large-scalce quantum processors.
Integration Technology Challenges in Quantum Computers
The Size, Noise and Wires Matter
Introduction: In 2012, potassium and sodium ion channels in Hodgkin-Huxley-based brain models were shown to exhibit memristive behavior. This positioned memristors as strong candidates for implementing biologically accurate artificial neurons. Memristor-based brain simulations offer advantages in energy efficiency, scalability, and compactness, benefiting fields such as soft robotics, embedded systems, and neuroprosthetics. Methods: Previous approaches used current-controlled Mott memristors, which poorly matched the voltage-controlled nature of ion channels. This study employs volatile, oxide-based memristors that leverage electric-field-driven oxygen-vacancy migration to emulate voltage-dependent channel behavior. We selected candidate WOx and NbOx memristors and modeled their dynamics to verify performance as Hodgkin-Huxley potassium channels. Results: The device exhibits sigmoidal gating and voltage-dependent time constants consistent with the theoretical model. By scaling the passive circuitry around the memristors, we show that they capture the essential mechanisms of potassium ion-channels, although spike height is reduced due to strong non-linear voltage-dependence. Still, by cascading multiple compartments, typical spike propagation is retained. Discussion: This is the first demonstration of a voltage-controlled memristor replicating the Hodgkin-Huxley potassium channel, validating its potential for more efficient brain simulation hardware.
Memristor technology has shown great promise for energy-efficient computing [1] , though it is still facing many challenges [1 , 2]. For instance, the required additional costly electroforming to establish conductive pathways is seen as a significant drawback as it contributes to power and area overheads, and limited device endurance. In this work, we propose a novel forming-free HfO2 -based ReRAM device with low operating voltages , multi-level capability , and less sensitivity to device-to-device (D2D) and cycle-to-cycle (C2C) variations. The device is fabricated using CMOS-compatible processes, excluding the undesirable complex steps mandatory to manufacture the state-of-the-art forming-free devices [3, 4, 5]. This is accomplished by utilizing the desirable formation energy of Pd-O bonds [6, 7], which creates conducting paths at room temperature while maintaining the analog switching ability of the devices. The proposed ReRAM device holds a great value for dense memories and energy-efficient compute architectures.
For quantum computing modules using diamond color centers, we propose an integrated structure of a quantum chip with photonic circuits and an interposer with electric circuits. The chip and interposer are connected via gold stud bumps using flip-chip bonding technology. For evaluating the proposed integrated structure, we bonded a test chip of 15 × 15 mm2, corresponding to the area that allows the allocation of color center qubits in the order of 102, with an interposer of 20 × 20 mm2, including test measurement lines. We confirm all connections of 16 lines with two bumps for each line at 10 K. The resistance of the lines with two bumps at 10 K is ~ 3.5O, These resistances are mainly attributed to the gold lines on the interposer, which is confirmed by simulations. The shear strength of the flip-chip bonded structure is 67 g/bump. It is larger than that of previous reports where the chips passed the standard temperature cycle test. Moreover, we integrate the flip-chip bonded structure with a printed circuit board (PCB). We confirm a connection between the connector terminal of the PCB and the test chip at 80 K. It is shown that the integrated structure using gold stud bumps has a potentially highly reliable connection at cryogenic temperature. These results will lead to realizing large-scale diamond spin quantum processors.
Quantum computer chip based on spin qubits in diamond uses modules that are entangled with on-chip optical links. This enables an increased connectivity and a negligible crosstalk and error-rate when the number of qubits increases onchip. Here, 3D integration is the key enabling technology for a large-scale integration of the diamond spin qubits with photonic and electronic circuits for routing, control and readout of qubits. There are several engineering challenges to integrate the large number of spins in diamond with the on-chip circuits operating at a cryogenic temperature. In this paper we will address challenges, present recent results and discuss future outlook of the integration technology for realization of a scalable quantum computer based on diamond spin qubits.
Surface-activated direct bonding of diamond (100) and c-plane sapphire substrates is investigated using Ar atom beam irradiation and high-pressure contact at RT. The success probability of bonding strongly depends on the surface properties, i.e, atomic smoothness for the micron-order area and global flatness for the entire substrate. Structural analysis reveals that transformation from sapphire to Al-rich amorphous layer is key to obtaining stable bonding. The beam irradiation time has optimal conditions for sufficiently strong bonding, and strong bonding with a shear strength of more than 14 MPa is successfully realized. Moreover, by evaluating the photoluminescence of nitrogen-vacancy centers in the diamond substrate, the bonding interface is confirmed to have high transparency in the visible wavelength region. These results indicate that the method used in this work is a promising fabrication platform for quantum modules using diamonds.
Quantum computer chip based on spin qubits in diamond uses modules that are entangled with on-chip optical links. This enables an increased connectivity and a negligible crosstalk and error-rate when the number of qubits increases on-chip. Here, 3D integration is the key enabling technology for a large-scale integration of the diamond spin qubits with photonic circuits and CMOS electronics for routing, control and readout of qubits. Several engineering challenges exist in order to integrate the large number of spins in diamond with the on-chip circuits operating at a cryogenic temperature. We will review trends, address challenges and discuss future outlook of the integration technology for realization of a scalable quantum computer based on diamond spin qubits.