Color centers in diamond offer exciting opportunities for implementing an effective solid-state spinphoton interface. Access to and control of spin-photon interaction can help realize a scalable, modular quantum computer using the color center spins. A large magnetic field is needed for splitting the color center spin states, enabling definition of the qubits. In addition to the large, global magnetic field (∼1T), applying a small and tunable magnetic field (order of mT) in the vicinity of individual color centers is advantageous as it allows for external field inhomogeneity compensation and multiplexing of the qubit driving frequency. Local tuning of the magnetic field magnitude might be achieved by driving DC currents through microscopic coils located in close proximity of the respective color centers. Since the systems must be located at cryogenic temperatures, cooling power is limited. Superconducting coils are therefore considered for local tuning instead of conventional metal. Design requirements for the local tuning coils depend strongly on design choices of the external magnet, externally applied field magnitude, number of FDM channels and coil distance from the color center. In order to find a design process that easily accounts for changes in these choices, the utilization of FEM physics simulations is studied. Two simulation methods are considered and tested in COMSOL Multiphysics. The first method is called 𝐻-𝜙-formulation, which is considered for optimizing the coil geometry. This method is based on a classical description of superconductivity and is shown here to have potential for simulating large coil structures. The second method allows for 3D simulation of superconductors based on the time-dependent Ginzburg-Landau (TDGL) equations. This method is considered with the goal of predicting changes in critical current density due to differences in cross-section dimensions. It is shown that this method can qualitatively reproduce transport characteristics of microscopic wires when no magnetic field is applied. When a magnetic field is applied, the observed vortex dynamics and resistivity correspond to that of material with no impurities or defects. Adding impurities in the form of geometrical deformations is shown here to be possible. However, further development on the method is required in order to overcome computational limitations and to determine unknown factors such as the impurity density and pinning forces. Until such time, the design procedure recommended in this thesis is based on 𝐻-𝜙-formulation simulations in combination with measurements of straight transport lines for critical current density characterization. Fabrication of NbTiN films is successfully tested by patterning coil-shaped structures, followed by DC magnetron sputtering and liftoff. The coil structures will be used to measure deviations from the expected critical current density due to geometry and to validate the recommended design procedure. Straight lines NbTiN geometries are fabricated with the purpose of finding the critical current density as a function of cross-section dimensions and magnetic field. These samples will be used to select the cross-section dimensions that deliver optimal critical current density, which will consequently be used in simulation to optimize the geometry.

Classical computer have difficulties simulating specific complex problems, therefore other computation options are being explored. One of these options is the quantum computer, which is expected to excel in various industries. The challenge for the quantum computer is scaling it up to a high number of qubits. The diamond-based quantum computer is a suitable candidate for quantum computer, because it can be made scalable, with long coherence times, relatively high temperatures and low cross talk. Making such a scalable modular quantum computer using diamond qubits requires heterogeneous integration of optical components. Multiple integrations techniques for optical components exist, however in this thesis we are particularly interested in integrating a superconducting nanowire single photon detector (SNSPD) with pick & place onto the quantum chip to read out the photons emitted by diamond color-centers. The main goal of this thesis is to find out which integration scheme leads to the highest on-chip detection efficiency of a pick & place on waveguide integrated SNSPD. In this work we designed a silicon nitride structure with low loss tapered support structures. Next different releasing methods are introduced to release the fabricated silicon nitride structure independent of the material stack and with a high yield. Lastly, we show how waveguide structures can be pick & placed on receptor chips that underwent surface treatment.

Demand for high density, high bandwidth, and low power Integrated Circuits (ICs) is rapidly increasing even as Moore's Law is starting to plateau. Among the new wave of technologies that are meant to continue the prevalent trend of semiconductor device scaling, 3D System Integration promises many advantages over traditional single-planar designs. This technology enables designers to stack multiple dies and unlock new functionality by reducing the footprint of the final device package. Using 3D Integration, multiple different types of chiplets (Digital IC, Analog IC, MEMS) can be integrated into a single package, potentially bypassing an expensive move to a newer process node and unlocking even more functionality from the same package. These downscaling issues are not limited to traditional CMOS technologies but extend to Quantum Computers. Due to the highly heterogeneous nature of Quantum ICs, and especially their requirement of low qubit decoherence noise, we require high-density connections from the Qubit layer to the Microelectronics Control layer while maintaining appropriate spacial separation between the two. In this project, the qubit layer is comprised of Diamond Colour Centers in a Photonic IC with other optical components such as SNSPDs, and MEMS switches. On the other hand, the microelectronics control layer is a Cryogenic CMOS chip. The main goal of this project is to design an Interposer and related technologies like Through Silicon Vias (TSVs) and Microbumps to successfully integrate these two chiplets in a single 3D assembly. We conduct thermal analysis of multiple 3D assembly designs using Finite Element Modelling to derive optimum fabrication specifications. Subsequently, fabrication recipes are developed and optimised for TSV etching, coating, and patterning with superconductive sidewall liners. Recipes are also developed to fabricate Indium Microbumps using techniques like evaporation, liftoff, and atmospheric reflow. Utilizing these microbumps, we conduct cold-compression flip-chip experiments. Finally, we establish cryogenic measurement setups to electrically characterize these fabricated devices.

A new antenna measurement setup, the Antenna Dome, is being developed, which can provide real time antenna and beamformer measurements. In order to be able to validate this setup, an existing beamforming system will be will be extensively studied and characterized. Multiple measurement setups will be used, providing multiple measured characteristics. The result is an accurate statistical model for the steering system, and a comprehensive error model for the complete beamforming system, including the provided antenna array. This model will help in validating the functionality of the Antenna Dome, and ultimately will help in its further development.

Quantum sensing technology has emerged as a promising field with superior sensitivity and accuracy in magnetic field sensing compared to conventional technologies. This breakthrough offers significant prospects in the biomedical sector, particularly in the realm of medical imaging. This project focuses on the implementation of quantum sensing using an array of single Nitrogen Vacancy (NV) centers combined with an array of Single Photon Avalanche Diodes (SPADs). SPADs are available in various technologies and forms. To identify the optimal SPAD for this specific application, different SPADs with diverse parameters are designed on a chip using standard 40 nm TSMC process. These parameters include active area, active area shape and metal shielding. The research aims to validate and characterize the performance of these distinct SPADs. However, during the validation tests, it was observed that the SPADs did not meet the criteria. The presence of ESD diodes on the chip introduced a low resistance current path, thereby hindering the characterisation process of the SPADs. Solutions to fix this problem and improve the system are provided. The documented validation methods include general chip testing, establishing the I-V curves of the SPADs and avalanche and quenching testing. In addition, the characterisation methods for junction capacitance, dark count rate (DCR), photon detection probability (PDP) and time jitter are given. For characterizing DCR and PDP a readout system is designed. It consists of an analog-to-digital converter (ADC), FPGA and Arduino. The data is communicated continuously to a PC. The ADC is not fully tested. On the other hand, the FPGA and Arduino are tested and verified to be sufficient for the DCR measurements. The readout system is too inaccurate for PDP measurements. A recommendation on how to make the readout system sufficient for PDP is given.

In this thesis, the realization and qualification of an anechoic dome chamber for 5G antenna’s is discussed. As with audio, where no echoes or noise from outside is wanted when listening to music, when characterizing an antenna it must be prevented to get internal reflections or electromagnetic (EM) radiation from outside. For this reason, a measurement setup was simulated, using that setup, different absorbers were tested and characterized. And a Faraday cage shielding is designed and evaluated, to remove EM interference. To make the anechoic chamber physically possible, rebuilding the minidome was also required, so that the absorber and Faraday cage could be mounted on the inner wand of the dome. Eventually, a suitable test environment for 5G antenna’s is build. In the end, the assessment of the absorbing materials was completed, and the chamber achieved all requirements. Despite the space of improvement, the idea of building an anechoic chamber is successfully verified.

Resistive RAM, or RRAM, is one of the emerging non-volatile memory (NVM) technologies, which could be used in the near future to fill the gap in the memory hierarchy between dynamic RAM (DRAM) and Flash, or even completely replace Flash. RRAM operates faster than Flash, but is still non-volatile, which enables it to be used in a dense 3D NVM array. It is also a suitable candidate for computation-in-memory, neuromorphic computing and reconfigurable computing. However, the show stopping problem of RRAM is that it suffers from unique defects, which is the reason why RRAM is still not widely commercially adopted. These defects differ from those that appear in CMOS technology, due to the arbitrary nature of the forming process. They can not be detected by conventional tests and cause defective devices to go unnoticed. Therefore, new tests need to be developed that properly include the physics of a defective device in a RRAM model. Device-aware testing (DAT) is the state-of-the-art solution to this problem. By accounting for the unique physics of an RRAM device, DAT is able to detect unique RRAM defects. However, DAT bases its results on relatively compact electrical models, which do not account for randomness present in e.g. the forming of the filament and local temperature fluctuations. Meanwhile, many low-level physical models exist already that can model this randomness and provide accurate insights into the physical specifics of RRAM. These models do, however, hardly ever analyze the effects of defects. The contribution of this work is to expand and improve one of the state-of-the-art physical models to analyse manufacturing defects on a low, near atomic-level scale. For the first time, the characteristics of a defect can be described in the physical shape of the defect, rather than only the electrical consequences of a black box device. This enables deep level analysis and characterization of defects, the results of which improves DAT to detect even more unique defects. The model is applied to four types of RRAM-related defects: oxygen vacancy density fluctuation, oxide thickness variation, electrode roughness, and contamination by impurities. The effect of the defects on the conductivity of the device are observed and explained, and their unique non-linear behavior is confirmed by simulation. Dynamic defects are not yet included, but the model does provide an extensive static characterization of unique RRAM defects, providing insights into their behavior and improving the quality of DAT. Finally, a discussion is presented which criticizes the reproducability of the referenced defect-free model, but also shows the potential of this work's model to be improved.

Silicon heterojunction solar cells employing transition metal oxides as carrier selective contact are of particular interest due to the potential of reducing parasitic absorption while featuring optimal electrical properties. Recently, a record efficiency of 23.5% was achieved by employing molybdenum oxide (MoOx) as carrier selective contact. MoOx exhibits advantageous properties with respect to the p-doped standard amorphous silicon contacts due to its lower parasitic absorption and better thermal stability. However, achieving an efficient carrier collection is challenging and not well understood yet. In this work, transport of charge is studied from drift diffusion and atomistic approach by means of numerical simulations. Two different state-of-art computational tools are employed: TCAD Sentaurus for drift diffusion simulations, and VASP for ab initio simulations. Through drift diffusion simulations, the contact formation of molybdenum oxide as carrier selective contact is consistently explored including quantum confinement and transport based in mid-gap energy states. The work function of MoOx is shown to be the core for an efficient charge collection. Thanks to experimental results, it is revealed relevant phenomenon at MoOx/intrinsic amorphous silicon (i-a-Si:H) interface which includes silicon oxide formation and charge accumulated. Therefore, a special focus at interface is here presented, in order to study the inner physics of the detrimental effects and how to avoid them. Altogether, drift diffusion simulations reveal that MoOx thickness is an essential parameter because it strongly determines the work function and hence the efficiency of the solar cell. All the knowledge acquired is used to provide guidelines on the fabrication of these type of solar cells. Looking at MoOx/a-Si:H interface, ab initio simulations are employed to study interface properties. Accordingly, such interface is analysed using both materials in their crystalline matrix. It is demonstrated that oxygen deficiency tunes the MoOx work function, a statement which is key for the proper contact formation and consistent with drift diffusion results. Finally, the charge arrangement at interface reveals the creation of an interface dipole together with silicon dioxide interlayer which is coherent with drift diffusion simulations analysis.

This report focuses on the design and implementation of both a detection system and an enclosure, which are designed to be used in a quantum random number generator. These parts are designed to be manufactured using off-the-shelf components to make the quantum random number generator affordable and accessible to a completely new user-group that cannot afford and operate the currently existing alternatives for quantum random number generation. After implementing the designed systems it is found that although the output of the system is random, true-randomness cannot be guaranteed using off the shelf components, because of the interference of classical noise sources.

If a practical quantum computer is to be built, it will not only need quantum programming languages and qubits, but hardware-software interfaces as well. These interfaces, also known as computer (micro)architectures are the key to creating a ’quantum stack’, where a programmer can directly execute programs onto quantum hardware. A functional quantum computer microarchitecture, the Central Controller-Light (CCLight), has been designed, implemented on a Field Programmable Gate Array (FPGA), and verified to control superconducting qubits successfully. The next logical step, in hopes of creating a more scalable quantum computing system, is to take the CCLight and implement it as an Application-Specific Integrated Circuit (ASIC). In this thesis, the CCLight was built into an ASIC. It was shown that this approach yields the potential for higher performance and lower power for the microarchitecture core, and the groundwork for more robust and automatic testing of similar microarchitectures was laid out. Lastly, the lack of scalability in the original approach, wherein the processor transmits multi-byte codewords to the analog/RF hardware controlling the qubits, was revealed.

Quantum computing promises revolutionary advancements in computational power by leveraging quantum mechanical phenomena such as superposition and entanglement. Diamond color centers have emerged as promising candidates for quantum information processing due to their long coherence times and scalability. Photonic integrated circuits (PICs), represent a mature technology that facilitates on-chip quantum operations in a compact and scalable manner. In quantum applications, PICs play a crucial role in routing and manipulating quantum information. The transition to the "More than Moore era," following the plateauing of Moore's law, has highlighted the importance of MEMS (Micro-Electro-Mechanical Systems) technology for continued advancements in electronics. Integrating MEMS with PICs and quantum applications, due to its high performance and mass production capabilities, offers a promising avenue for large-scale device integration and multi-qubit systems. Designing photonic devices for integration with diamond color-center qubits presents several challenges. Primarily, designing photonic devices for the visible spectrum involves challenges related to device feature sizes approaching the limits of fabrication resolution. Additional challenges include ensuring scalability in quantum computing and compatibility with complementary metal-oxide semiconductor (CMOS) electronics. This requires devices that operate with low power consumption, low actuation voltage, and minimal crosstalk, necessitating significant optimization of MEMS components. Furthermore, integrating MEMS devices demands careful consideration of the mechanical properties of the materials and the designed structures. This project discusses the design, fabrication, and characterization of a photonic directional coupler for use in beamsplitter and optical MEMS switch configurations in the visible spectrum. The photonic beamsplitter is essential for the controlled manipulation of quantum states, crucial for executing quantum algorithms. The optical MEMS switch provides dynamic control over optical pathways, leveraging the advantages of photonics and MEMS technology. The goal of this project is to optimize the directional coupler design for footprint, and fabrication accuracy, and to propose a directional coupler-based optical MEMS switch design that features low actuation voltage and high extinction ratio. Additionally, this project aims to establish the process recipes for fabricating the designed directional couplers and MEMS components, with particular attention to the physical resolution of small feature sizes, and to evaluate the extent to which the designed performance is achieved. By addressing these topics, the project aims to contribute to the large-scale integration of diamond color center qubits for quantum computing applications.

Over the past few years, post-surgery monitoring has become an important aspect of the patient’s healthcare in the modern clinical medicine. This kind of monitoring is done to examine various physical and chemical parameters, while considering any post-surgery complications. Therefore, the patient’s care is continued even after the surgical treatment and any sudden complications can be prevented from this intensive monitoring. For this purpose, electronic implantable sensors are preferred to monitor the various required physiological factors such as blood pressure, body temperature, heart rate, etc. This kind of in-vivo measurements can be done by directly implanting the sensors at the afflicted site inside the patient’s body. Therefore, the implantable biosensors are commonly used to monitor and measure various parameters such as pressure, stress and strain, pH, and many others in a less invasive way. As the implantable biosensors are directly placed on the tissue or organ for monitoring, the efficiency of sensing and mapping the required information can be achieved by maximal surface contact. This can be fulfilled with the help of the wide range of available flexible and stretchable materials such as polyimide, PDMS, and many more. Instead of the conventional IC fabrication process, printing technology is a better alternative to fabricate these flexible and stretchable biosensors at low cost with a great amount of substrate choices. Among the available semiconducting inks, liquid silicon proved to be a better choice in making devices with good performance. The term ‘liquid silicon’ refers to silicon-based polymers such as Polysilanes. Thus, the combination of liquid silicon based implantable biosensors on flexible and stretchable substrates has lot of potential to be explored. In this thesis, the focus is to print a conductive polysilicon layer on a flexible and stretchable substrate. Initially, the substrate materials- Polyimide and PDMS are chosen as per the requirements of flexibility, stretchability, biocompatibility and mechanical stability. After the preparing the substrate, the liquid silicon is coated on top of the substrate and the wettability is adjusted during the coating with the help of UV light. This polysilane layer is crystallised using KrF excimer laser to form a polysilicon layer. Thus, the polysilicon layer of thickness of about 200 nm is formed on top of a flexible and stretchable substrate. This work forms the basis for future work in which the polysilicon resistors can be fabricated to be used as piezoresistive strain sensors. It can be further explored to include other functionalities such as real-time monitoring and self-sufficient in terms of power, etc. The choice of materials can be further expanded to include bio-resorbable materials such as silk, gelatin, and many more.

Modular quantum computer chip based on spin qubits in diamond will enable an increased connectivity, a high fidelity, and a low error-rate when the number of qubits increases. The high-quality diamond substrates have the maximum size in the order of mm2, preventing use of advanced semiconductor manufacturing line. Therefore, for a large-scale integration of qubits, there is a need for a wafer-scale diamond for scalable nanofabrication. Here, diamond-on-insulator structure will enable self-standing diamond structure by under-etching the insulator. Hydrophilic direct bonding of single crystalline diamond substrate on silicon is a promising approach. In this research, a process is developed and optimized for hydrophilic direct bonding of (100)-oriented diamond on a low-temperature deposited SiO2 on silicon substrate. The process condition involves treating a (100) CVD diamond substrate in a Piranha solution. A 300-nm-thick SiO2 is PECVD deposited on a (100) silicon wafer which afterwards undergoes a surface activation process by oxygen plasma. The two substrates were contacted in an ambient without applying pressure, cooled, and then annealed. It should be noted that there was no pressure applied during the annealing. By die shear testing, a strong shear strength was measured and further elongating the Piranha cleaning time provided more shear strength bonding.

Diamond color centers have been increasingly gaining attention in research due to their desirable optical properties that make them suitable for applications such as quantum computing, quantum sensing and quantum communication. However, the main challenge has been on-chip integration of diamond color centers with high scalability and high yield. Many diamond integration methods have been researched, such as heterogeneous wafer bonding of diamond-on-insulator photonics. While this method offers high scalability and wafer level fabrication, optical performance is not guaranteed due to the non-ideal processing which results in lower yield. Another integration method is pick and place, which demonstrated high yield as the diamond color centers can be pre-selected before integration, and thus resulting in higher yield. Here, pick and place integration of diamond nano-photonic structures is presented. For that purpose, an adiabatic coupler is designed, with simulation results showing 0.36 dB insertion loss and 3dB misalignment tolerance of 180 nm and 5 um in x and z directions respectively. A mechanical support structure is designed such that optical losses at that interface are minimized. The simulated loss is reduced from 33 % to only 4 % and the cross-talk is -11 dB. Further optical measurement is needed to determine the achieved transmission of the integrated diamond chiplets. Finally, pick and place is performed with 6 different supporting structure designs. The yield is 25 % with minimum misalignment of 50 nm which is mainly dominated by random motion of the diamond chiplet as it gets closer to the receptor chip. This random motion is attributed to the surface roughness of the receptor chip and and lower surface of the diamond chiplet. In addition, residual charges in both chips results in Coulomb forces acting on the diamond chiplet and thus contributing to the misalignment. It is expected that the magnitude of the random motion, and consequently, the misalignment, will be improved by treating the receptor chip surface with HMDS and de-ionizing both the diamond chiplet and the receptor chip.

Silicon accelerometers used in the automotive industry should be improved in resolution and accuracy. Exploiting quantum effects in diamond to improve sensing accuracy is a popular technique for nanoscale sensing applications. This thesis will present a new design concept for an accelerometer using these quantum effects for sensing on a macroscopic scale. This sensor can sense these forces with a resolution of 6g and a range of 120g. In measurement time it is slower than current sensors, but our sensor can still serve as a prototype to be improved in the future.

Electron spins trapped in quantum dots have recently proven to be a promising technology for the implementation of qubits, already demonstrating high fidelity single- and two-qubits gates. The next step towards fault-tolerant quantum computing is to increase the number of so-called spin qubits on the processor. However, this poses several challenges, one of which being how to implement single-qubit gates in multi-qubit systems, with high fidelity. This work focused on two aspects. The first one was to identify the physical phenomena and limitations that hinder the realisation of high fidelity single-qubit gates in multi-qubit environments. The second objective was to investigate, implement and optimise methods in order to minimise the impact of these perturbing phenomena. The identified perturbing effects include unwanted driving between a pulse and the neighbouring qubits, as well as frequency shifts induced by drive-spin coupling and non-ideal pulse in experimental setups. Crosstalk was addressed using pulse shaping (i.e. amplitude or phase modulation of the driving pulse to tailor its spectral characteristics and reduce the energy transmitted at unwanted frequencies). The performance of shapes taken from both NMR and signal processing literature was investigated, for various pulse parameters, through an extensive grid search. In addition, a frequency correction algorithm was devised: off-resonant drive frequencies are selected so that the shifted qubits are resonantly driven. It currently accounts for two phenomena: the AC Stark and Bloch-Siegert shifts. The algorithm furthermore tracks the changes caused by the time-dependent characteristics of the shaped pulses. The proposed frequency correction algorithm was shown to almost entirely negate the effects of the considered shifts, leading to unitary fidelity improvements by up to 55%. In addition, pulse shaping was demonstrated to noticeably improve the fidelity of simultaneous single-qubit rotations compared to unshaped driving. Rotations with fidelities as high as 99.98% were obtained for pi/2 rotations on two-qubits systems. Moreover, shapes whose Fourier transform is narrow and sharp, associated with low Rabi frequencies, were demonstrated to generally provide the highest fidelities of the tested configurations. Lastly, the trends and guidelines highlighted by these results were shown to scale to systems with larger numbers of qubits. The correction techniques investigated in this work have proven promising for the implementation of high fidelity single-qubit gates in multi-qubit systems. In particular, the guidelines for selecting a well-performing pulse shape should also be useful for the design of optimised driving schemes, regardless of the number of qubits involved. Additionally, the proposed frequency shift correction algorithm is expected to be able to handle arbitrary shifts, and so to be easily adaptable to use in experiments.

3-D chip integration is considered to be the best way for further increasing the number of qubits on chip, and also for integration of qubits and readout electronics. Works have been done to stack two wafers with superconductive interconnections as a demonstration for feasibility of 3-D qubit integration.But all of them use an extra layer of adhesives, indium in particular, to join two neighboring planes.Indium is a good choice of adhesive for wafer bonding at cryogenic temperature. However, there are potential issues to employ this extra layer of adhesive. First, the critical temperature (Tc) of indium being 3.4K means it is suitable preferably for superconducting qubits, but not good enough for qubit implementations or other cryogenic that have above-4K expectations. Second, one general problem in wafer bonding is that alignment is not accurate. Adding an extra layer of anything increases the degree of misalignment. In this work, the extra adhesive layer is abandoned and two wafers are bonded by direct-bonding technique. First, niobium nitride (NbN) is chosen to be the skeleton for this 3-D structure due to its high Tc (18K) as well as its simple composition hence easy fabrication. Sputtering is the method used to fabricate such metal nitride. Sample with Tc=15.6K has been measured so far. Second, both wafer-scale and miniaturized pattern are designed to measure contact resistance of direct bonding of NbN films in room and cryogenic temperature. This work shows the potential of direct-wafer bonding in 3-D chip integration at cryogenic environment, and could further lead to scaling up of quantum processors.

DNA aligning is a compute-intensive and time-consuming task required for all further DNA processing. It consists in finding for each DNA string from a sample its location in a reference genome. Usual techniques for short reads (hundreds of bases) involve seed-extension, where a small matching seed is found with quick search through FM-index and then extended on both ends with a custom Smith-Waterman algorithm, giving optimal solution. However this seed-extension takes a tremendous amount of time. This is why we present in this thesis a solution to offload extension on a GPU to be done in a parallel fashion. This is possible thanks to the fact that the DNA reads do not present any kind of relation between each other. We used the Burrows-Wheeler Aligner - Maximal Exact Match (BWA-MEM), a reference program in the field, to which we integrated a GPU-accelerated library for extension, GASAL2. However, BWA-MEM has a left-right dependency on extension starting scores, with the left alignment starting with the seed score, then the right part starting with the previously calculated left score. We designed a solution by starting both extensions with the seed score, we called this method the "seed-only" paradigm. On our test machine featuring 12 hyperthreaded cores and an NVIDIA Tesla K40c, when running with 12 threads, we could observe a raw kernel speed-up of 4.8x ; but if we allow non-blocking calls to let the CPU run the seeding tasks while the GPU computes the extension, we can reach a 16x effective speed-up for the extension. This extension part takes around 27% of the total time but our acceleration introduces a small overhead due to memory preparations and copying, which makes the whole application 1.28x faster, getting close to the theoretical maximum of 1.37x. Additionally, the paradigm shift we operated creates minimal differences in the final main scores on good quality alignments, with a 1.82% difference for our 5.2 million sequences data set. This makes our acceleration with GASAL2 an solid and efficient solution for a single machine.

In this Bachelor graduation project, a 16x16 Single Photon Avalanche Diode (SPAD) array is designed in 40nm TSMC CMOS for diamond single Nitrogen Vacancy center array readout. It includes an active quenching and recharge circuit (AQC), a hold-off circuit for controllable dead-time and IO electronics for off-chip communication. The chip is part of a proposed high sensitivity magnetometer based on single NV center readout with a focus on detecting cancer in biological samples. From the Quantum Integration Technology (QIT) lab, pre-designed SPADs were received to be implemented into the design together with SPAD quenching, recharge and input-output controller electronics. A SPAD model is adapted from literature for simulations of the electric behaviour of the electronics. We present a design and implementation of the Active Quenching Circuit (AQC), a design and implementation of the recharge and hold-off circuits, Input-Output (IO) interface design and implementation and the final top-level implementation ready for the next tape out. Post-layout simulations show negligible speed slowdown and distortion. The AQC has a 12ns quenching time and a 1ns recharge time, leading to a theoretical maximum count rate of 76Mc/s. The hold-off circuit has a tunable dead-time for afterpulsing reduction and 16, 16 bit parallel-in-serial-out (PISO) modules allow per-row readout of the array. The electronics are co-located with the SPADs and pixel pitch is 24𝜇m. The final chip design meets the single NV fluorescence count rate requirement of above 3 Mc/s, the 1.1x1.1 𝑚𝑚2 area requirement, the 32-pin IO requirement, the 16x16 SPAD pixel requirement and, steps have been taken to ensure acceptable crosstalk levels in the array. Finally, the SPAD array chip is designed to run on a 1GHz clock. It should interface with an FPGA that configures the hold-off circuit and reads out the SPAD status bits.

Entanglement is an essential resource for a variety of applications, such as distributed quantum computing and quantum cryptography. However, long-distance entanglement generation is challenging because of two reasons: photon loss occurs as an exponential function of distance through an optical fiber and the no-cloning theorem prevent us from directly amplifying the photons. Therefore, quantum repeaters that enable long-distance communication to realize quantum information-based protocols are desired. One way to achieve a higher entanglement generation rate is to make many attempts of generating entangled states in parallel, a process known as time-multiplexing. There has been previous work investigating the performance of time-multiplexed entanglement generation using processing nodes, but only at the elementary link level. Furthermore, this analysis was restricted to the rate of entanglement generation, with no concern for the fidelity. In this work, we go further by investigating both the fidelity and the rate of entanglement generation of time-multiplexed protocols by analyzing the secret key rate (SKR) of quantum key distribution. Moreover, we also study setups with one and two repeaters. Specifically, we investigate the impact of different hardware parameters on the SKR. Among other results, we conclude that swap gate time is a key factor for achieving higher SKR. We also examine what effect different repeater-chain protocols have on the performance of repeater chains with limited hardware resources. We find that having the repeater send photons in alternating fashion towards both end nodes results in a higher SKR than generating entanglement sequentially. Besides, we investigate what is the most efficient distribution of communication qubit (CQ) in a protocol with multiple repeaters. We ascertain that the repeater chain setup in which the number of CQs in a node is equal to that node's number of neighbors makes best use of its resources.