S.J. Heemskerk
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Sub-100-μV Cryogenic Biasing with Low-Noise Multilevel Memristors
Pt-Interface Tuning for Scalable Qubit Control
We demonstrate Pt/HfO2/Pt/Ti/Pt memristors enabling sub-100 μV cryogenic biasing for scalable qubit control. Compared with pure Pt-based stacks, the Pt-interface-engineered lowers the effective barrier by approximately 0.3 eV, achieving bipolar switching, read-noise ≤0.32% at approximately 4.0 K. Monte-Carlo analysis confirms bias resolution < 100 μV in a six-device programmable-gain amplifier (PGA), validating that interface-engineer can path the way for cryogenic memristors-based wiring bottleneck compared with Au/Pt-based memristors for cryo-compatible analog memory applications.