C. Strydis
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18 records found
1
Real-Time Brain Simulation on Resource-Constrained FPGAs Using Neural Network-Based LUT Compression
Low-resource Hodgkin-Huxley Model Simulation
This thesis presents BrainLUT, a resource-efficient FPGA architecture that implements the nonlinear ion-channel computations of the HH model using neural network-generated lookup tables. The proposed approach leverages Quantisation-Aware Training (QAT) and adapted NeuraLUT and ReducedLUT methodologies to approximate complex HH functions with compact logic-based lookup tables, eliminating the need for expensive arithmetic evaluation while preserving model fidelity. Multiple hardware architectures and optimisation techniques, including structural decomposition, lookup table compression, derivative-based prediction, neural-network-based LUT generation, and reduced numerical precision, are explored to identify an optimal design.
The resulting proof-of-concept implementation simulates 1,250 Hodgkin–Huxley neurons in real time on a Xilinx Artix-7 XC7A200T FPGA operating at 125 MHz, utilising only 6,307 LUTs (4.71%), 15 BRAMs (3.01%), and 4 DSP blocks (0.54%). Although not achieving the highest absolute neuron count reported in the literature, the proposed architecture demonstrates substantially improved resource efficiency and neuron density compared with existing FPGA implementations of the Hodgkin–Huxley model. These results establish BrainLUT as a scalable and resource-efficient foundation for future large-scale, biophysically accurate neuromorphic systems. ...
This thesis presents BrainLUT, a resource-efficient FPGA architecture that implements the nonlinear ion-channel computations of the HH model using neural network-generated lookup tables. The proposed approach leverages Quantisation-Aware Training (QAT) and adapted NeuraLUT and ReducedLUT methodologies to approximate complex HH functions with compact logic-based lookup tables, eliminating the need for expensive arithmetic evaluation while preserving model fidelity. Multiple hardware architectures and optimisation techniques, including structural decomposition, lookup table compression, derivative-based prediction, neural-network-based LUT generation, and reduced numerical precision, are explored to identify an optimal design.
The resulting proof-of-concept implementation simulates 1,250 Hodgkin–Huxley neurons in real time on a Xilinx Artix-7 XC7A200T FPGA operating at 125 MHz, utilising only 6,307 LUTs (4.71%), 15 BRAMs (3.01%), and 4 DSP blocks (0.54%). Although not achieving the highest absolute neuron count reported in the literature, the proposed architecture demonstrates substantially improved resource efficiency and neuron density compared with existing FPGA implementations of the Hodgkin–Huxley model. These results establish BrainLUT as a scalable and resource-efficient foundation for future large-scale, biophysically accurate neuromorphic systems.
Accelerating Real-Time Voltage Imaging
A Modular, GPU-Accelerated Framework for High-Speed Neural Signal Extraction
Identifying and Modulating Pathological Brain Connectivity: A Computational Approach
Patient-Specific, Virtual Brain Twins and Network Neuromodulation
virtual brain models were designed and implemented which enable analysis of simulated neural activity and connectivity networks, and enable in silico neuromodulation. The framework is tested and validated using an EEG dataset consisting of neural-activity recordings belonging to patients diagnosed with neuropathic pain and a separate healthy control group. Our computational framework shows high ability in identifying disease-specific abnormalities in network connectivity and in constructing pathological network hubs, with accuracies up to 98.6% in explaining neuropathic pain. Patient-specific,
brain-model construction is also able to accurately represent empirical patterns of connectivity in simulation. Furthermore, the simulated neuromodulation with personalized virtual brains demonstrates the ability to accurately model dynamic modulation of brain connectivity networks. These findings illustrate the effectiveness of our overall framework and highlight the potential for integration into clinical decision-making and closed-loop implantable neuromodulation systems, enabling more effective treatment of brain disorders. ...
virtual brain models were designed and implemented which enable analysis of simulated neural activity and connectivity networks, and enable in silico neuromodulation. The framework is tested and validated using an EEG dataset consisting of neural-activity recordings belonging to patients diagnosed with neuropathic pain and a separate healthy control group. Our computational framework shows high ability in identifying disease-specific abnormalities in network connectivity and in constructing pathological network hubs, with accuracies up to 98.6% in explaining neuropathic pain. Patient-specific,
brain-model construction is also able to accurately represent empirical patterns of connectivity in simulation. Furthermore, the simulated neuromodulation with personalized virtual brains demonstrates the ability to accurately model dynamic modulation of brain connectivity networks. These findings illustrate the effectiveness of our overall framework and highlight the potential for integration into clinical decision-making and closed-loop implantable neuromodulation systems, enabling more effective treatment of brain disorders.
NeuroLogger
Ultra-Light Neural Activity Recorder
Neurologger: Ultra Light Neural Activity Recorder
Hardware Design and Implementation
The Neuroscience department at the Erasmus Medical Center (EMC) has been conducting these sorts of experiments on mice using either wired or battery-based neural recording devices (Neurologgers). These devices simply make neural recordings without processing the data in any other way. To get the most realistic neural response in the brain, the mouse should be free to move and not be limited by the recording device. Ideally, signal processing and spike detection is done immediately on the device, so that it outputs useful data instead of raw data.
For these reasons our group was given the task by the Neuroscience department to make a battery-based neural-logging device containing an FPGA for real-time signal processing and spike detection. In this thesis, the design process, implementation and validation of the hardware of this so called Neurologger is discussed.
We were able to make a compact design that weighs 4.139 g without battery. It has an FPGA which performs real-time signal processing and spike detection. Two neural probes can be attached to perform neural recordings in multiple parts of the brain. Finally, 64 channels can be recorded simultaneously at a sampling rate of 20 kHz.
This thesis also contains a proposal for an even smaller Neurologger design. Making specific design choices, more channels can be recorded with a device that has a significantly smaller surface area than the current design. ...
The Neuroscience department at the Erasmus Medical Center (EMC) has been conducting these sorts of experiments on mice using either wired or battery-based neural recording devices (Neurologgers). These devices simply make neural recordings without processing the data in any other way. To get the most realistic neural response in the brain, the mouse should be free to move and not be limited by the recording device. Ideally, signal processing and spike detection is done immediately on the device, so that it outputs useful data instead of raw data.
For these reasons our group was given the task by the Neuroscience department to make a battery-based neural-logging device containing an FPGA for real-time signal processing and spike detection. In this thesis, the design process, implementation and validation of the hardware of this so called Neurologger is discussed.
We were able to make a compact design that weighs 4.139 g without battery. It has an FPGA which performs real-time signal processing and spike detection. Two neural probes can be attached to perform neural recordings in multiple parts of the brain. Finally, 64 channels can be recorded simultaneously at a sampling rate of 20 kHz.
This thesis also contains a proposal for an even smaller Neurologger design. Making specific design choices, more channels can be recorded with a device that has a significantly smaller surface area than the current design.
Extending the Computing Capabilities of Neural Interfaces
GPU Integration to the ONIX Electrophysiology System
Heterogeneous Acceleration of Neural-Mass Models towards Digital Brain Twins
Porting The Virtual Brain on the Versal ACAP
The Virtual Brain (TVB) is a simulation framework that takes a different approach to brain modeling. TVB reduces complexity at the micro level to achieve the macro level of brain modeling and simulation. This approach in brain modeling is referred to as Large-scale Brain Network or Neural-Mass Modeling. Additionally, TVB incorporates individual brain-imaging data with the models to achieve personalized, patient-specific digital brain twins. The digital brain twins can be used in clinical settings such as neurosurgeries and real-time brain-interface systems. However, building and utilizing such large-scale brain models requires high performance and low latency in terms of computation.
Today, heterogeneous architectures, due to their enhanced performance, energy efficiency, and better flexibility are being utilized increasingly in computing systems ranging from low-power edge devices to high-performance cloud infrastructures. Versal Adaptive Compute Acceleration Platform (ACAP) is a high-performance, heterogeneous computing platform developed by Xilinx/AMD. Versal ACAP offers an array of vector processors, specialized in artificial intelligence (AI) and signal processing workloads, next to the traditional programmable logic with extensive memory resources. The large-scale neural-mass simulation problem at hand has heterogeneous computational needs, which makes it interesting to see how it maps to the Versal ACAP. In this work, we explore the benefits and challenges of using heterogeneous systems (specifically, the Versal ACAP) in the high-performance workload of large-scale neural-mass simulation.
We designed and implemented a dataflow-style system for large-scale brain network simulation on the Versal ACAP. Two different versions of this system, namely AIE-Only and Heterogeneous, were developed in order to explore the capabilities of the Versal ACAP when accelerating our application. Compared to the current GPU version of TVB, the Heterogeneous implementation performed on average around 4× slower in terms of throughput. However, the Versal ACAP Heterogeneous implementation delivered around 13× lower latency, two orders of magnitude better energy efficiency, and around 2× better power efficiency compared to the GPU version of TVB. Although the Heterogeneous implementation falls short in terms of throughput compared to the GPU version, its lower latency and energy efficiency make it suitable for real-time applications that might use large-scale neural-mass modeling such as virtual surgery or brain interface devices. ...
The Virtual Brain (TVB) is a simulation framework that takes a different approach to brain modeling. TVB reduces complexity at the micro level to achieve the macro level of brain modeling and simulation. This approach in brain modeling is referred to as Large-scale Brain Network or Neural-Mass Modeling. Additionally, TVB incorporates individual brain-imaging data with the models to achieve personalized, patient-specific digital brain twins. The digital brain twins can be used in clinical settings such as neurosurgeries and real-time brain-interface systems. However, building and utilizing such large-scale brain models requires high performance and low latency in terms of computation.
Today, heterogeneous architectures, due to their enhanced performance, energy efficiency, and better flexibility are being utilized increasingly in computing systems ranging from low-power edge devices to high-performance cloud infrastructures. Versal Adaptive Compute Acceleration Platform (ACAP) is a high-performance, heterogeneous computing platform developed by Xilinx/AMD. Versal ACAP offers an array of vector processors, specialized in artificial intelligence (AI) and signal processing workloads, next to the traditional programmable logic with extensive memory resources. The large-scale neural-mass simulation problem at hand has heterogeneous computational needs, which makes it interesting to see how it maps to the Versal ACAP. In this work, we explore the benefits and challenges of using heterogeneous systems (specifically, the Versal ACAP) in the high-performance workload of large-scale neural-mass simulation.
We designed and implemented a dataflow-style system for large-scale brain network simulation on the Versal ACAP. Two different versions of this system, namely AIE-Only and Heterogeneous, were developed in order to explore the capabilities of the Versal ACAP when accelerating our application. Compared to the current GPU version of TVB, the Heterogeneous implementation performed on average around 4× slower in terms of throughput. However, the Versal ACAP Heterogeneous implementation delivered around 13× lower latency, two orders of magnitude better energy efficiency, and around 2× better power efficiency compared to the GPU version of TVB. Although the Heterogeneous implementation falls short in terms of throughput compared to the GPU version, its lower latency and energy efficiency make it suitable for real-time applications that might use large-scale neural-mass modeling such as virtual surgery or brain interface devices.
This work contributes in investigating methods for increasing the abstraction
level of data flow programming by using a Polyhedral Process Network (PPN) as abstraction to facilitate automated analysis and transformation of data flow applications. A Polyhedral Process Network (PPN) is a process network based on Polyhedral Compilation (PC) a mathematical framework for code analysis and optimisations.
A tool has been implemented to translate a PPN to a data flow implementation. The Maxeler Data Flow Engine (DFE) technology, a data flow hardware platform supported by a tool-flow, is used as target technology. For a number of specific challenges involved in the transformation from PPN to DFE-implementation a method has been implemented. This has shown that a PPN as well as the capabilities of PC are useful concepts that are applicable to further increase of the abstraction-level of data flow computing. However the transformation from PPN to DFE-implementation is complex. Therefore this work concludes that the development of a data flow tailored Polyhedral Compilation (PC) abstraction is the most promising future direction. ...
This work contributes in investigating methods for increasing the abstraction
level of data flow programming by using a Polyhedral Process Network (PPN) as abstraction to facilitate automated analysis and transformation of data flow applications. A Polyhedral Process Network (PPN) is a process network based on Polyhedral Compilation (PC) a mathematical framework for code analysis and optimisations.
A tool has been implemented to translate a PPN to a data flow implementation. The Maxeler Data Flow Engine (DFE) technology, a data flow hardware platform supported by a tool-flow, is used as target technology. For a number of specific challenges involved in the transformation from PPN to DFE-implementation a method has been implemented. This has shown that a PPN as well as the capabilities of PC are useful concepts that are applicable to further increase of the abstraction-level of data flow computing. However the transformation from PPN to DFE-implementation is complex. Therefore this work concludes that the development of a data flow tailored Polyhedral Compilation (PC) abstraction is the most promising future direction.
Full-Whisker Tracking System
A new algorithm for accurate whisker tracking in untrimmed head-fixed mice.
Real-time Face and Landmark Localization for Eyeblink-Response Detection
A heterogenous CPU-GPU approach
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