Ad
A.J. de Jong
info
Please Note
<p>This page displays the records of the person named above and is not linked to a unique person identifier. This record may need to be merged to a profile.</p>
2 records found
1
Functional ultrasound is by now a well-established technique in the neuroscience community to measure brain activity. However, the transcranial application of functional ultrasound on humans, with the exception of the acoustic windows in the skull, remains a huge challenge because of the properties of the cranial bone the acoustic waves will reflect, refract, attenuate or will cause aberration. Therefore, the signal-to-noise ratio (SNR) of the incoming signal is too low for transcranial functional ultrasound (TCfUS). This thesis tries to overcome the SNR problem of TCfUS with the design of a 64-channel ultrasound acquisition system that is focused on achieving the highest SNR possible. This is achieved by placing the analog front-end (AFE) chips as near to the transducer elements as possible and by oversampling the incoming signal with a factor of 25, a theoretical increase of 15 dB of the signal-to-quantization-noise ratio over the current state-of-the-art is estimated. The proposed design is a receive-only system where the transmission of the ultrasound pulses is carried out by a separate ultrasound system. The design splits the acquisition system into a front-end and a back-end subsystem, where the front-end system is implemented using four AFE58JD48 analog front-end chips from Texas Instruments. From here the data samples are transported over fiber optics to the back-end subsystem, which consists of a VCK190 FPGA board from Xilinx, where the samples are processed and/or transported to a workstation for storage. Because the system organization differentiates from more conventional research ultrasound systems, a trade-off is introduced between processing and throughput, resulting in three processing configurations for the FPGA with each a different focus: raw RF data sampling, real-time processing, and hardware processing. Due to time and resource constraints, no measurements and results are available on the SNR and decimation. However, a theoretical exploration has been done on the expandability of the number of channels which was found to be 192 channels for the VCK190.
...
Functional ultrasound is by now a well-established technique in the neuroscience community to measure brain activity. However, the transcranial application of functional ultrasound on humans, with the exception of the acoustic windows in the skull, remains a huge challenge because of the properties of the cranial bone the acoustic waves will reflect, refract, attenuate or will cause aberration. Therefore, the signal-to-noise ratio (SNR) of the incoming signal is too low for transcranial functional ultrasound (TCfUS). This thesis tries to overcome the SNR problem of TCfUS with the design of a 64-channel ultrasound acquisition system that is focused on achieving the highest SNR possible. This is achieved by placing the analog front-end (AFE) chips as near to the transducer elements as possible and by oversampling the incoming signal with a factor of 25, a theoretical increase of 15 dB of the signal-to-quantization-noise ratio over the current state-of-the-art is estimated. The proposed design is a receive-only system where the transmission of the ultrasound pulses is carried out by a separate ultrasound system. The design splits the acquisition system into a front-end and a back-end subsystem, where the front-end system is implemented using four AFE58JD48 analog front-end chips from Texas Instruments. From here the data samples are transported over fiber optics to the back-end subsystem, which consists of a VCK190 FPGA board from Xilinx, where the samples are processed and/or transported to a workstation for storage. Because the system organization differentiates from more conventional research ultrasound systems, a trade-off is introduced between processing and throughput, resulting in three processing configurations for the FPGA with each a different focus: raw RF data sampling, real-time processing, and hardware processing. Due to time and resource constraints, no measurements and results are available on the SNR and decimation. However, a theoretical exploration has been done on the expandability of the number of channels which was found to be 192 channels for the VCK190.
Bachelor thesis
(2019)
-
Jan de Jong, Martijn Heller, Paddy French, Andre Bossche, Andrea Neto, Mottaqiallah Taouil
This report details the design of an instrumentation system to be used on a skeleton sled. The system will measure data during the run on a skeleton track using several sensors and process and visualise the data afterwards in order to shorten the learning curve of the athlete and give quantitative feedback. The subsystem discussed in this report concerns the measurement of the forces between the body and the sled in order to analyse the steering behaviour of the athlete. This is accomplished via thin film resistive force transducers. The g-forces on the athlete and the sled and the orientation of the sled are measured as well in order to give a better insight how this influences steering and is measured using an IMU (Inertial Measurement Unit). The data is collected using an ESP32 microprocessor.
...
This report details the design of an instrumentation system to be used on a skeleton sled. The system will measure data during the run on a skeleton track using several sensors and process and visualise the data afterwards in order to shorten the learning curve of the athlete and give quantitative feedback. The subsystem discussed in this report concerns the measurement of the forces between the body and the sled in order to analyse the steering behaviour of the athlete. This is accomplished via thin film resistive force transducers. The g-forces on the athlete and the sled and the orientation of the sled are measured as well in order to give a better insight how this influences steering and is measured using an IMU (Inertial Measurement Unit). The data is collected using an ESP32 microprocessor.