Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm

Conference Paper (2016)
Authors

Johan Peltenburg (TU Delft - Computer Engineering)

Shanshan Ren (TU Delft - Computer Engineering)

Z. Al-Ars (TU Delft - Computer Engineering)

Research Group
Computer Engineering
To reference this document use:
https://doi.org/10.1109/BIBM.2016.7822616
More Info
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Publication Year
2016
Language
English
Related content
Research Group
Computer Engineering
Pages (from-to)
758-762
ISBN (electronic)
978-1-5090-1610-5
DOI:
https://doi.org/10.1109/BIBM.2016.7822616

Abstract

In the analysis of next-generation DNA sequencing data, Hidden Markov Models (HMMs) are used to perform variant calling between DNA sequences and a reference genome. The PairHMM model is solved by the Forward Algorithm, for which the performance and power efficiency can be increased tremendously using systolic arrays (SAs) in FPGAs. We model the performance characteristics of such SAs, and propose a novel architecture that allows the computational units to continuously perform useful work on the input data. The implementation achieves up to 90\% of the theoretical throughput for a real dataset. The implementation of the proposed architecture achieves more than 2.5x throughput over the state-of-the-art on a similar contemporary platform.

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