Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm

Conference paper (2016)

Authors

J.W. Peltenburg Computer Engineering - EEMCS
S. Ren Computer Engineering - EEMCS
Z. Al-Ars Computer Engineering - EEMCS
Research Group
Computer Engineering (EEMCS) (TU Delft)
FPGA PairHMM High-Throughput Sequencing GATK Haplotype-Caller Systolic Array
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Published Date

2016-12

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering