The safe operating volume as a general measure for the operating limits of LDMOS transistors
Alessandro Ferrara (University of Twente)
Peter Steeneken (NXP Semiconductors, TU Delft - QN/Steeneken Lab)
Anco Heringa (NXP Semiconductors)
Boni K. Boksteen (University of Twente)
M Swanenberg (NXP Semiconductors)
AJ Scholten (NXP Semiconductors)
L van Dijk (NXP Semiconductors)
Jurriaan Schmitz (University of Twente)
Raymond J.E. Hueting (University of Twente)
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Abstract
In this work, analytical stability equations are derived and combined with a physics-based model of an LDMOS transistor in order to identify the primary cause of failure in different operating and bias conditions. It is found that there is a gradual boundary between an electrical failure region at high drain voltage and a thermal failure region at high junction temperature. The theoretical results are mapped onto a 3D space comprising gate-width normalized drain current, drain voltage and junction temperature, allowing an immediate visualization of the different failure mechanisms. The validity of the proposed analysis is supported by measurements of the safe operating limits of silicon-on-insulator (SOI) LDMOS transistors.
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