Evaluation of RISC-V for Software-defined Medium Access Control

Abstract

The number of wireless devices has grown exponentially in recent years, and Bluetooth is a major component of personal wireless communication devices. In some Renesas Bluetooth devices, a Configurable Media Access Control (CMAC) is responsible for the real-time control of the radio front-end and execution of lower layers of Bluetooth applications and it uses an embedded ARM CPU. However, this design faces limitations in core architecture modification and requires royalty payments.

This thesis investigates the feasibility of replacing the ARM processor with a RISC-V core within the CMAC to overcome these limitations. RISC-V, an open-source instruction set architecture, offers the flexibility of custom instruction extensions that can be used to accelerate Bluetooth applications and a core can be freely implemented without licensing fees. These features make it a promising alternative for the CMAC internal CPU.

This thesis defines a set of Key Performance Indicators (KPIs) relevant to the requirements of the CPU within the CMAC and conducts a comprehensive investigation of RISC-V cores, ranging from open-source to commercial cores. Ultimately, the Renesas' in-house developed RISC-V core is selected as the candidate. Multiple benchmarks are then performed to evaluate its performance. The benchmarks demonstrate that the RISC-V core outperforms the original ARM core by 33% in execution speed while reducing design costs despite a larger gate count. Additionally, the code size gap of the RISC-V implementation can be reduced to 7% through the use of the code size reduction instruction extension (Zc).

Repetitive register field manipulation patterns are identified as a common pattern in CMAC firmware and custom instructions are proposed and simulated to accelerate these patterns. The custom instructions can achieve a maximum of 36,73% in cycle count and 43,84% in code size for targeted benchmarks.

These results suggest that the RISC-V core in CMAC can provide both performance improvement and cost savings compared with the existing ARM design while offering greater flexibility. With custom instructions, the RISC-V processors can be further adapted for specific Bluetooth applications. This thesis offers a guideline for developing future Bluetooth devices with RISC-V processors.