SIC JFET switching behavior in a drive inverter under influence of circuit parasitics

Conference paper (2011)

Authors

I. Josifovic Electrical Power Processing
J. Popovic Electrical Power Processing
Jan Abraham Ferreira Electrical Power Processing
Research Group
Electrical Power Processing
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Published Date

2011

Language

English

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Research Group

Electrical Power Processing

Abstract

This paper investigates the switching behaviour of normally-off SiC JFETs in an inverter for a motor drive. The parasitic ringing caused by different parasitic effects is analysed. Two different methods, the use of an RC snubber and the use of a ferrite bead, are proposed for dampening the parasitic oscillations. It is found that applying a ferrite bead not only dampens the parasitic oscillations but also results in significantly lower switching losses. Furthermore, it is shown that the capacitive coupling between SiC devices and heat sinks significantly deteriorates the JFETs' switching performance. The effect of two substrates, an IMS and a PCB, on the capacitive coupling is investigated. A method in which the use of two separate heat sinks minimises the capacitive coupling thus exploiting the full potential of fast SiC JFETs is proposed.