A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

Conference Paper (2016)
Author(s)

Kristof Blutman (NXP Semiconductors)

A. Kapoor (NXP Semiconductors)

Arjun Majumdar (NXP Semiconductors)

J.G. Martinez (NXP Semiconductors)

J. Echeverri (NXP Semiconductors)

L. Sevat (NXP Semiconductors)

A. van der Wel (NXP Semiconductors)

H. Fatemi (NXP Semiconductors)

J.P. de Gyvez (NXP Semiconductors)

K.A.A. Makinwa (TU Delft - Microelectronics)

Department
Microelectronics
DOI related publication
https://doi.org/10.1109/vlsic.2016.7573478 Final published version
More Info
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Publication Year
2016
Language
English
Department
Microelectronics
Pages (from-to)
1-2
ISBN (electronic)
978-1-5090-0635-9
Event
30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 (2016-06-14 - 2016-06-17), Honolulu, United States
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Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).