A Highly Linear I/Q Interleaving DDRM

A 4GHz Low Power, Highly Linear I/Q Interleaving DDRM in 40nm CMOS Technology

Master thesis (2022)

Authors

A.R. Deshpande Electrical Engineering, Mathematics and Computer Science

Contributors

S.M. Alavi Electronics - EEMCS (supervisor 1)
Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright: © 2022 Atharva Deshpande
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Published Date

27-01-2022

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

In recent years, the demand for wireless communication devices is rapidly increasing and it is estimated to keep growing exponentially over the coming decade. This demand is accompanied by a demand for high-speed and reliable communication. One of the challenges faced by the RF design engineers is to fulfill these demands while utilizing the limited resource of the frequency spectrum to its full potential. High-bandwidth, multi-channel communication protocols are often used to address these requirements. Over the past decade, digital intensive transmitters are gaining popularity because of their suitability to be used with such protocols. This project addresses a requirement of a highly linear direct digital to RF modulator (DDRM) which fulfills the stringent adjacent channel leakage ratio (ACLR) and in-band linearity requirements of the modern communication standards. The main goal of this project is to design a low-power, highly linear DDRM with high modulation bandwidth that can provide an accurate reference signal to a high-power counterpart. This project presents a 2x11-bit, 4GHz digital-intensive I/Q interleaving DDRM with peak output power equal to 2dBm and maximum modulation bandwidth of 400MHz. The DDRM features a second order hold (SOH) interpolation filtering, digital pre-distortion-like unit cell configuration and complete digital CMOS based I/Q interleaving and mixing. The simulation results indicate that the DDRM achieves spurious free dynamic range lower than -50dBc in a 3.5GHz-4.5GHz band. Also the harmonic distortion (HD), intermodulation product (IM), counter-intermodulation (C-IM) products remain below -50dBc for a tone frequency of 400MHz. The entire design consumes 234mW of power. An additional harmonic rejection technique is evaluated which improves C-IM by 3dB-12dB.