A Fine-Grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model

Conference paper (2019)

Authors

Jian Fang Jian Fang Computer Engineering - EEMCS
Jinho Lee Jinho Lee IBM Research
Zaid Al-Ars Zaid Al-Ars Computer Engineering - EEMCS
Peter Hofstee Peter Hofstee Computer Engineering - EEMCS , IBM Research
Research Group
Computer Engineering (EEMCS) (TU Delft)
FPGA Fine grained Parallelism Snappy Decompressor
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Published Date

2019

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

Snappy is a widely used (de) compression algorithm in many big data applications. Such a data compression technique has been proven to be successful to save storage space and to reduce the amount of data transmission from/to storage devices. In this paper, we present a fine-grained parallel Snappy decompressor on FPGAs running under a relaxed execution model that addresses the following main challenges in existing solutions. First, existing designs either can only process one token per cycle or can process multiple tokens per cycle with low area efficiency and/or low clock frequency. Second, the high read-after-write data dependency during decompression introduces stalls which pull down the throughput.

Files

08735518.pdf
(.pdf | 0.143 Mb)