Untestable faults identification in GPGPUs for safety-critical applications

Conference Paper (2019)
Author(s)

Josie E.Rodriguez Condia (Politecnico di Torino)

F. Augusto da Silva (TU Delft - Computer Engineering, Cadence Design Systems)

S. Hamdioui (TU Delft - Quantum & Computer Engineering)

Christian Sauer (Cadence Design Systems)

Matteo Sonza Reorda (Politecnico di Torino)

Research Group
Computer Engineering
Copyright
© 2019 Josie E.Rodriguez Condia, F. Augusto da Silva, S. Hamdioui, C. Sauer, M. Sonza Reorda
DOI related publication
https://doi.org/10.1109/ICECS46596.2019.8964677
More Info
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Publication Year
2019
Language
English
Copyright
© 2019 Josie E.Rodriguez Condia, F. Augusto da Silva, S. Hamdioui, C. Sauer, M. Sonza Reorda
Research Group
Computer Engineering
Pages (from-to)
570-573
ISBN (electronic)
9781728109961
Reuse Rights

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Abstract

Nowadays, General Purpose Graphics Processing Units (GPGPUs) devices are considered as promising solutions for high-performance safety-critical applications, such as those in the automotive field. However, their adoption requires solutions to effectively detect faults arising in the device during the operative life. Hence, effective in-field test solutions are required to guarantee high-reliability levels. In this paper, we leverage the results of Software-Based Self-Test (SBST) based approaches for GPGPUs by deploying new techniques for automating the identification of untestable faults (UF). Our methodology has achieved fault coverage of 82.8% when applied to an open-source implementation of the NVIDIA G80 GPU architecture. The proposed approach combining SBSTs and UFs identification appears as an effective solution for the reliability analysis of GPGPUs.

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