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ALMARVI Execution Platform

Heterogeneous Video Processing SoC Platform on FPGA

Journal Article (2019)
Author(s)

Joost Hoozemans (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Jeroen van Straten (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Timo Viitanen (Tampere University)

Aleksi Tervo (Tampere University)

Jiri Kadlec (UTIA)

Zaid Al-Ars (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1007/s11265-018-1424-1 Final published version
More Info
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Publication Year
2019
Language
English
Research Group
Computer Engineering
Issue number
1
Volume number
91
Pages (from-to)
61-73
Downloads counter
175
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Institutional Repository
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Abstract

The proliferation of processing hardware alternatives allows developers to use various customized computing platforms to run their applications in an optimal way. However, porting application code on custom hardware requires a lot of development and porting effort. This paper describes a heterogeneous computational platform (the ALMARVI execution platform) comprising of multiple communicating processors that allow easy programmability through an interface to OpenCL. The ALMARVI platform uses processing elements based on both VLIW and Transport Triggered Architectures (ρ-VEX and TCE cores, respectively). It can be implemented on Zynq devices such as the ZedBoard, and supports OpenCL by means of the pocl (Portable OpenCL) project and our ALMAIF interface specification. This allows developers to execute kernels transparently on either processing elements, thereby allowing to optimize execution time with minimal design and development effort.