Two calibration methods to improve the linearity of a CMOS image sensor

Conference Paper (2018)
Author(s)

Fei Wang (TU Delft - Electronic Instrumentation)

Albert Theuwissen (TU Delft - Electronic Instrumentation)

DOI related publication
https://doi.org/10.2352/ISSN.2470-1173.2018.11.IMSE-458 Final published version
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Publication Year
2018
Language
English
Pages (from-to)
458-1-458-5
Event
Human Vision and Electronic Imaging 2018 IS&T International Symposium on Electronic Imaging 2018 (2018-01-28 - 2018-02-02), Burlingame, United States
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Abstract

This paper presents two on-chip calibration methods for improving the linearity of a CMOS image sensor (CIS). A prototype 128 × 128 pixel sensor with a size of 10 μm×12 μm is fabricated using a 0.18 μm 1P4M CIS process. Both calibration methods show obvious improvement on the linearity of the CIS. Compared with the voltage mode (VM) calibration, the pixel mode (PM) calibration method achieves better linearity results by improving the nonlinearity of the CIS 26×. This results in a minimum nonlinearity of 0.026%, which is a 2× better than the state-of-the-art.