Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

Conference paper (2016)

Authors

M. Zandrahimi Computer Engineering -

Z. Al-Ars Computer Engineering -

Philippe Debaud STMicroelectronics

Armand Castillejo STMicroelectronics

Research Group

Computer Engineering () (TU Delft)

Monitoring Timing Temperature measurement Temperature sensors Performance evaluation Semiconductor device measurement Frequency measurement

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http://resolver.tudelft.nl/uuid:a15fb05d-d4cb-4c5f-8199-47c4a3ac56ab

Published Date

2016

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

Circuit monitoring techniques have been adopted widely to compensate for process, voltage, and temperature variations as well as power optimization of integrated circuits. For cost and complexity reasons, these techniques are usually implemented by means of performance monitors allowing fast performance evaluation during production. In this paper, we demonstrate the limitations of performance monitoring methodologies in terms of accuracy and effectiveness. Silicon measurements of a nanometric FD-SOI device show that the required design margin is above 10% of the clock cycle, which leads to unacceptable waste of
power.