High Impedance Fault Detection in Real-Time and Evaluation Using Hardware-In-Loop Testing

Conference Paper (2018)
Author(s)

Rishabh Bhandia (TU Delft - Intelligent Electrical Power Grids)

Jose de Jesus Chavez (TU Delft - Intelligent Electrical Power Grids)

Miloš Cvetković (TU Delft - Intelligent Electrical Power Grids)

P. Palensky (TU Delft - Intelligent Electrical Power Grids)

Research Group
Intelligent Electrical Power Grids
Copyright
© 2018 R. Bhandia, Jose de Jesus Chavez, M. Cvetkovic, P. Palensky
DOI related publication
https://doi.org/10.1109/IECON.2018.8591824
More Info
expand_more
Publication Year
2018
Language
English
Copyright
© 2018 R. Bhandia, Jose de Jesus Chavez, M. Cvetkovic, P. Palensky
Research Group
Intelligent Electrical Power Grids
Pages (from-to)
182-187
ISBN (electronic)
978-1-5090-6684-1
Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Abstract

High Impedance Fault (HIF) is a low fault current event which cannot always be efficiently detected or cleared by conventional protection systems. Voltage or current signal distortions are often a possible indicator of HIF signatures which need to be carefully analyzed. This paper proposes a new technique based on second-difference approach to detect signal distortions. The technique does not require large database and is computationally very lightweight. The performance of the proposed technique is compared against commercial protection relays connected in Hardware-in-Loop (HIL) mode to a Real Time Digital Simulator (RTDS) simulating HIF in an IEEE 9-bus system. Test result evaluation show that the proposed technique is accurate and dependable.

Files

High_Impedance_Fault_Detection... (pdf)
(pdf | 0.586 Mb)
- Embargo expired in 22-12-2021
License info not available