An 800 nW Switched-Capacitor Feature Extraction Filterbank for Sound Classification

Journal Article (2021)
Author(s)

D.A. Villamizar (Stanford University)

Dante Muratore (Stanford University)

J.B. Wieser (Texas Instruments)

B. Murmann (Stanford University)

Affiliation
External organisation
DOI related publication
https://doi.org/10.1109/TCSI.2020.3047035
More Info
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Publication Year
2021
Language
English
Affiliation
External organisation
Issue number
4
Volume number
68
Pages (from-to)
1578 - 1588

Abstract

This paper presents a 32-channel analog filterbank for front-end signal processing in sound classification systems. It employs a passive N-path switched capacitor topology to achieve high power efficiency and reconfigurability. The circuit's unwanted harmonic mixing products are absorbed by the machine learning model during training. To enable a systematic pre-silicon study of this effect, we develop a computationally efficient circuit model that can process large machine learning datasets on practical time scales. Measured results using a 130 nm CMOS prototype IC indicate competitive classification accuracy on datasets for baby cry detection (93.7% AUC) and voice commands (92.4% average precision), while lowering the feature extraction energy compared to digital realizations by approximately 2× and 10×, respectively. The 1.44 mm 2 chip consumes 800 nW, which corresponds to the lowest normalized power per simultaneously sampled channel in recent literature.

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