Dead Time Control Circuit in Monolithic GaN Class D Audio Amplifier
J. Pan (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Qinwen Fan – Mentor (TU Delft - Electronic Components, Technology and Materials)
Pim J. French – Graduation committee member (TU Delft - Bio-Electronics)
Marco Berkhout – Graduation committee member (Goodix Technology)
More Info
expand_more
Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.
Abstract
GaN transistors have advantages over conventional Si MOSFETs, such as lower on-resistance, lower parasitic capacitance, higher break-down voltage, etc. However, due to the lack of the body diode, when GaN transistors conduct reverse current during dead time, the source-drain voltage (VSD) can be very large (up to 4-5 V, depending on the output current). High reverse conduction voltage leads to large power loss during dead time for the GaN class D amplifier. In this project, a dead time control circuit is proposed. With the dead time control circuit, the dead time can be reduced from a large default value to around 5 ns. The output power of the class D amplifier can be improved, and the third-order harmonic distortion can also be improved by 5-10 dB for different corners and temperatures.
Files
File under embargo until 13-10-2025