An automated formal-based approach for reducing undetected faults in ISO 26262 hardware compliant designs

Conference paper (2021)

Authors

F. Augusto da Silva Computer Engineering - EEMCS , Cadence Design Systems
Ahmet Cagri Bagbaba Cadence Design Systems
S. Hamdioui Quantum & Computer Engineering
Christian Sauer Cadence Design Systems
Research Group
Computer Engineering (EEMCS) (TU Delft)
Simulation Verification Formal Methods Functional Safety ISO 26262 Safe Faults Fault Injection
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Published Date

2021

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering

Abstract

The current demands for developing safe automotive applications require extensive analysis and evaluation of potential random hardware faults. In general, part of this analysis is manually performed by experts, resulting in an expensive, time-consuming, and error-prone process. This paper proposes an automated approach to classify faults overlooked by traditional methods. Our methodology deploys code coverage and formal to identify nodes that do not disrupt safety-critical functionalities, enabling the classification of additional faults. The approach is validated based on an Automotive CPU, according to ISO 26262 guidelines. The results show an improvement in Diagnostic Coverage of 1.15%, increasing the Single Point Fault Metric (SPFM) to 97.3%, enabling ASIL C compliance without any hardware redundancy.