A scalable, multi-thread, multi-issue array processor architecture for DSP applications based on extended tomasulo scheme
Conference Paper
(2006)
Author(s)
M Berekovic (TU Delft - Electrical Engineering, Mathematics and Computer Science)
T Niggemeier (External organisation)
Research Group
Computer Engineering
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https://resolver.tudelft.nl/uuid:c9b824b1-784f-4bce-b9a8-ce0c05c1cc1d
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Publication Year
2006
Research Group
Computer Engineering
Pages (from-to)
289-298
Publisher
Springer
Event
6th International Workshop, SAMOS 2006, Samos, Greece (2006-07-17 - 2006-07-20), Heidelberg
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