A combined design-time/test-time study of the vulnerability of sub-threshold devices to low voltage fault attacks
Journal Article
(2014)
Author(s)
A Barenghi (External organisation)
C Hocquet (External organisation)
D Bol (External organisation)
FX Standaert (External organisation)
F Regazzoni (TU Delft - Signal Processing Systems)
I Koren (External organisation)
Research Group
Signal Processing Systems
Copyright
© 2014 A Barenghi, C Hocquet, D Bol, FX Standaert, F. Regazzoni, I Koren
DOI related publication
https://doi.org/10.1109/TETC.2014.2316509
To reference this document use:
https://resolver.tudelft.nl/uuid:d4979779-286c-4f60-8cda-0305f6886913
More Info
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Publication Year
2014
Language
English
Copyright
© 2014 A Barenghi, C Hocquet, D Bol, FX Standaert, F. Regazzoni, I Koren
Research Group
Signal Processing Systems
Bibliographical Note
Harvest@en
Issue number
2
Volume number
2
Pages (from-to)
107-118
Reuse Rights
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