Risk assessment of voltage violations during unintentional islanding events
R.B. Iscuissati (Universidade de São Paulo)
José Carlos Melo Vieira (Universidade de São Paulo)
Reza Bakhshi-Jafarabadi (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Daniel Motter (Western Paraná State University )
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Abstract
The increasing penetration of distributed generators (DGs) has led to the proposal of fault ride-through (RT) requirements. These requirements enhance the reliability of the electrical system; however, reduce the sensitivity of anti-islanding protections, potentially exposing sensitive equipment to severe overvoltages before DG disconnection when an unintentional islanding occurs. To assess the extent of these events, also reported as load rejection overvoltage, this paper introduces the Voltage Violation Region (VVR) concept, i.e., an area in the ΔP × ΔQ plane given by the operating points in which anti-islanding protections fail to rapidly disconnect DGs before violating sensitive load tolerance limits. Based on dynamic simulations and the VVR, a risk assessment method is proposed to quantify the probability of post-islanding voltages violating the tolerance limit of voltage-sensitive loads. Our analysis of practical passive and active islanding detection methods (IDMs) reveals that RT requirements may significantly delay the activation of anti-islanding protections, resulting in high risks of voltage violations, depending on the tolerance curve and power imbalance measurements. When active IDMs are enabled, these violations may occur even in scenarios with deficit of active power imbalance within the islanded grid. The results support distribution engineers in identifying high-risk feeders, requesting end-users to apply additional protection for sensitive loads, or re-setting the DG's anti-islanding protections.