Quantum accelerated computer architectures

Conference Paper (2019)
Author(s)

L. Riesebos (TU Delft - FTQC/Bertels Lab)

X. Fu (National University of Defense Technology, TU Delft - Computer Engineering, TU Delft - FTQC/Bertels Lab)

A. A. Moueddenne (External organisation)

L. Lao (TU Delft - Computer Engineering, TU Delft - FTQC/Bertels Lab)

S. Varsamopoulos (TU Delft - FTQC/Bertels Lab)

I Ashraf (TU Delft - FTQC/Bertels Lab)

J. van Someren (TU Delft - Computer Engineering, TU Delft - FTQC/Bertels Lab)

Nader Khammassi (TU Delft - FTQC/Bertels Lab)

C. G. García Almudever (TU Delft - Computer Engineering, TU Delft - QuTech Advanced Research Centre)

K.L.M. Bertels (TU Delft - FTQC/Bertels Lab, TU Delft - (OLD)Quantum Computer Architectures)

Research Group
FTQC/Bertels Lab
DOI related publication
https://doi.org/10.1109/ISCAS.2019.8702488
More Info
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Publication Year
2019
Language
English
Research Group
FTQC/Bertels Lab
Volume number
2019-May
ISBN (electronic)
978-1-7281-0397-6

Abstract

Modern computer applications usually consist of a variety of components that often require quite different computational co-processors. Some examples of such co-processors are TPUs, GPUs or FPGAs. A more recent and promising technology that is being investigated is quantum co-processors. In this paper, we present a modern computer architecture where a quantum co-processor is included as an additional accelerator. In such an environment, the idea is to execute the application on a heterogeneous architecture where the classic processor will execute the host part, but certain components will be mapped, in our case, on the quantum accelerator. To this purpose, we define the distinct layers for the quantum computer architecture where there is a clear boundary between the host program and quantum kernel(s). We also discuss the opportunities and challenges of mapping hybrid algorithms to such a heterogeneous quantum computer architecture.

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