Multiqubit gate based on parity cross resonance

Journal Article (2026)
Author(s)

Xuexin Xu (Fundamentals of Future Information Technologies, Forschungszentrum Jülich)

Siyu Wang (RWTH Aachen University, Forschungszentrum Jülich)

Radhika Joshi (RWTH Aachen University, Forschungszentrum Jülich)

Rihan Hai (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Mohammad H. Ansari (Forschungszentrum Jülich)

Research Group
Web Information Systems
DOI related publication
https://doi.org/10.1103/6d5v-vrm4 Final published version
More Info
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Publication Year
2026
Language
English
Research Group
Web Information Systems
Journal title
Physical Review Applied
Issue number
4
Volume number
25
Article number
044045
Downloads counter
9
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Abstract

The realization of multiqubit entangling gates is essential for efficient, scalable, and fault-tolerant quantum information processing, reducing algorithmic complexity and circuit depth. We demonstrate a native three-qubit entangling gate implemented by simultaneously driving all qubits at a common frequency, exploiting engineered interactions to realize multicontrol operations in a single coherent step. By optimizing the conditional dynamics originating from drive-induced nonlocal contamination, desired interaction channels are selectively enhanced while spurious terms are suppressed, ensuring robust performance within the computational subspace. This gate enables key applications, including deterministic GHZ-state generation, Toffoli-class logic with a shortest gate duration of 90 ns and a highest fidelity of 99.72%, and a controlled-ZZ gate tailored for fast surface-code quantum error correction. Simulations based on realistic IBM device parameters indicate that the gate maintains high fidelity and resilience under increasing excitation numbers and larger Hilbert-space dimensions. Our results establish a foundation for co-designing circuit architectures and control strategies that harness native multiqubit interactions as fundamental building blocks for next-generation superconducting quantum processors, thereby enabling improved gate performance with more flexible tuning of circuit parameters.