Advancing Spin-Qubit Architectures

Abstract

This dissertation focuses on the unique challenges of designing scalable spin-qubit quantum processor architectures. Spin qubits are distinguished by their small size and compatibility with established semiconductor technology, positioning them as a promising platform for scalable quantum computing. However, the field faces significant hurdles, including interconnect bottlenecks, limited qubit counts, and operational constraints, which must be dealt with to unlock its full potential.

To address these challenges, we introduce the SpinQ framework, the first native compilation and design-space exploration tool specifically tailored to the distinct physical constraints and scalability characteristics of spin-qubit quantum processor architectures. SpinQ enables comprehensive performance evaluation of key sources of compilation overhead, provides architecture-specific optimization insights, and estimates hardware performance when mapping quantum circuits onto spin-qubit devices.

A key contribution of this dissertation is the introduction of several novel compilation techniques, which enable all the backend capabilities of SpinQ. One of them is the beSnake routing algorithm. It efficiently handles complex routing scenarios involving the movement of qubits through shuttles and SWAPs in spin-qubit processors. It can adapt seamlessly to various qubit connectivities while being noise-aware and capable of dynamically adjusting the level of routing optimization to meet specific user requirements. By fully utilizing the freedom offered by qubit shuttling operations in spin-qubit topologies, beSnake acts as an essential tool in efficiently mapping large-scale quantum circuits of up to 1,000 qubits.

This work also includes a comprehensive evaluation of spin-qubit architectures through Design Space Exploration (DSE), leveraging a custom automation tool known as ArtA (Artificial Architect) integrated within SpinQ. The reported exploration encompasses nearly 30,000 potential spin-qubit designs. As an overall system performance metric, an enhanced Estimated Success Probability (ESP) formula is proposed, capturing operational errors, crosstalk, and decoherence-induced effects. This augmented metric enables the identification of optimal design parameter choices and the trade-offs among them, ultimately providing crucial insights into architectural decisions that can improve the performance of arbitrary quantum algorithms.

Additionally, the dissertation introduces a novel benchmark method by utilizing SpinQ based on multipartite maximally-entangled states (MME), directly linking the entanglement capabilities of spin-qubit devices to their potential for quantum error correction. These benchmarks provide a more in-depth and nuanced evaluation of device performance compared to conventional ways. Notably, the findings reveal that smaller and less connected layouts, when paired with effective compilation techniques, can achieve performance values comparable to those of more complex architectures. These results highlight the importance of co-designing hardware and software to unlock the full potential of spin-qubit quantum processors.