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A scalable SIMD RISC-V based processor with customized vector extensions for CRYSTALS-kyber

Conference Paper (2022)
Author(s)

Huimin Li (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Nele Mentens (Katholieke Universiteit Leuven, Universiteit Leiden)

Stjepan Picek (TU Delft - Electrical Engineering, Mathematics and Computer Science, Radboud Universiteit Nijmegen)

Research Group
Cyber Security
DOI related publication
https://doi.org/10.1145/3489517.3530552 Final published version
More Info
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Publication Year
2022
Language
English
Research Group
Cyber Security
Pages (from-to)
733-738
ISBN (electronic)
9781450391429
Event
59th ACM/IEEE Design Automation Conference, DAC 2022 (2022-07-10 - 2022-07-14), San Francisco, United States
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Abstract

This paper uses RISC-V vector extensions to speed up lattice-based operations in architectures based on HW/SW co-design. We analyze the structure of the number-theoretic transform (NTT), inverse NTT (INTT), and coefficient-wise multiplication (CWM) in CRYSTALS-Kyber, a lattice-based key encapsulation mechanism. We propose 12 vector extensions for CRYSTALS-Kyber multiplication and four for finite field operations in combination with two optimizations of the HW/SW interface. This results in a speed-up of 141.7, 168.7, and 245.5 times for NTT, INTT, and CWM, respectively, compared with the baseline implementation, and a speed-up of over four times compared with the state-of-the-art HW/SW co-design using RV32IMC.