Modeling Static Noise Margin for FinFET based SRAM PUFs

Modeling Static Noise Margin for FinFET based SRAM PUFs

Masoumian, S. (TU Delft Computer Engineering; Intrinsic ID B.V.)
Selimis, Georgios (Intrinsic ID B.V.)
Maes, Roel (Intrinsic ID B.V.)
Schrijen, Geert-Jan (Intrinsic ID B.V.)
Hamdioui, S. (TU Delft Quantum & Computer Engineering)
Taouil, M. (TU Delft Computer Engineering)

Quantum & Computer Engineering

2020

In this paper, we develop an analytical PUF model based on a compact FinFET transistor model that calculates the PUF stability (i.e. PUF static noise margin (PSNM)) for FinFET based SRAMs. The model enables a quick design space exploration and may be used to identify critical parameters that affect the PSNM. The analytical model is validated with SPICE simulations. In our experiments, we analyze the impact of process variation, technology, and temperature on the PSNM. The results show that the analytical model matches very well with the simulation model. From the experiments we conclude the following: (1) nFET variations have a larger impact on the PSNM than pFET (1.5% higher PSNM in nFET variations than pFET variations at 25°C), (2) high performance SRAM cells are more skewed (1.3% higher PSNM) (3) the reproducibility increases with smaller technology nodes (0.8% PSNM increase from 20 to 14 nm) (4) increasing the temperature from-10°C to 120°C leads to a PSNM change of approximately 1.0% for an extreme nFET channel length.

FinFET
process variation
SRAM PUF
Static noise margin
temperature

http://resolver.tudelft.nl/uuid:0538d300-b3f7-447a-8bbd-421a959a67bf

https://doi.org/10.1109/ETS48528.2020.9131583

IEEE

978-1-7281-4313-2

2020 IEEE European Test Symposium (ETS): Proceedings

ETS 2020, 2020-05-25 → 2020-05-29, Tallinn, Estonia

Accepted author manuscript

Institutional Repository

conference paper

© 2020 S. Masoumian, Georgios Selimis, Roel Maes, Geert-Jan Schrijen, S. Hamdioui, M. Taouil