On Effective Graphene Based Computing

On Effective Graphene Based Computing

Cucu Laurenciu, N. (TU Delft Computer Engineering)
Cotofana, S.D. (TU Delft Computer Engineering)

Dinescu, M.A. (editor)
Dobrescu, D. (editor)
Muller, A. (editor)
Cristea, D. (editor)
Dragoman, M. (editor)
Muller, R. (editor)
Ciurea, M.L. (editor)
Neculoiu, D. (editor)
Brezeanu, Gh. (editor)

2018

With CMOS feature size heading towards atomic dimensions, unjustifiable static power, reliability, and economic implications are exacerbating, prompting for research on new materials, devices, and/or computation paradigms. Within this context, Graphene Nanoribbons (GNRs), owing to graphene's excellent electronic properties, may serve as basic blocks for carbon-based nanoelectronics. In this paper, we present the two main avenues, i.e., graphene FET- and GNR- based, undertaken towards graphene based computing. The first approach is conservative and focuses on the realization of graphene FET transistor based switches as MOSFET replacements to maintain the state of the art logic Boolean algebra paradigm design methodology. The second one follows a different line of thinking and seeks GNR-based structures able to provide more complex behaviours by making better use of graphene's conduction properties. We first discuss Graphene Nanoribbon (GNR) based field Effect Transistors (GNRFETs) and Tunnelling GNR based Transistors (GNRTFETs) and their utilization as underlying elements for Boolean gate implementations. Subsequently, we present GNR-based structures that can directly compute Boolean functions, e.g., NAND, XOR, by means of one GNR only and a way to complementary arrange them in energy effective gates. To get inside into the potential of the two avenues we consider an inverter as discussion vehicle and evaluate the designs in terms of area and energy consumption. The GNR-based structure outperforms its counterparts by 15× up to 104× and 230× smaller delay and 6 to 7 and 4 orders of magnitude smaller power than the GNRFET-and GNRTFET- based designs, respectively. Moreover, when compared with CMOS 7 nm Boolean gates GNR-based desgns exhibit up to 6× smaller delay, and up to 2 orders of magnitude smaller active area, and total power consumption. Our analysis confirms that the alternative GNR-based design paradigm, which transcends the traditional switch based approach and takes better advantage of graphene intrinsicnproperties, is better suited for future carbon based nanoelectronics.

Boolean Gates
Carbon-N anoelectronics
Conduction Maps
Energy Efficiency
Graphene Nanoribbons
Graphene-based Boolean Gates

http://resolver.tudelft.nl/uuid:3b4522a3-2e19-4151-8f96-2c2db75545fb

https://doi.org/10.1109/SMICND.2018.8539757

Institute of Electrical and Electronics Engineers (IEEE), Piscataway, NJ, USA

978-1-5386-4482-9

2018 41st International Semiconductor Conference, CAS 2018 - Proceedings, 2018-October

41st International Semiconductor Conference, CAS 2018, 2018-10-10 → 2018-10-12, Sinaia, Romania

Accepted author manuscript

Institutional Repository

conference paper

© 2018 N. Cucu Laurenciu, S.D. Cotofana