High Performance Digital-input Class-D Amplifier

Master thesis (2023)

Authors

K. Wu Electrical Engineering, Mathematics and Computer Science

Contributors

Q. Fan Electronic Components, Technology and Materials - EEMCS (mentor)
S.M. Alavi Electronics - EEMCS (graduation committee member)
Marco Berkhout Goodix Technology (graduation committee member)
Faculty
Electrical Engineering, Mathematics and Computer Science, Electrical Engineering, Mathematics and Computer Science
Copyright: © 2023 Keyu Wu
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Published Date

30-11-2023

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

Class-D amplifiers have gained popularity for their high-power efficiency, exceeding 90%. Among them, digital-input Class-D amplifiers stand out due to their superior integration and increased immunity to electromagnetic interference (EMI). This project introduces a high-performance digital-input Class-D amplifier, aiming for a dynamic range larger than 130 dB while maintaining total harmonic distortion (THD) at approximately -110 dB.

It employs a capacitive digital-to-analog converter (CDAC) to minimize noise. Mismatch in the CDAC is addressed through mismatch shaping techniques. Additionally, an open-loop transconductance stage is incorporated into the loop filter, enhancing dynamic range and striving for optimal performance. Extra paths are introduced in the loop filter to guarantee that amplifier swings are maintained within the designated range.

Files

High_Performance_Digital_input... (.pdf)
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File under embargo until 30-11-2025