Processor architecture and data buffering

Title

Processor architecture and data buffering

Author

Mulder, H.
Flynn, M.J.

Date

1992

To reference this document use:

http://resolver.tudelft.nl/uuid:23743a3a-7982-4a97-8f45-709cf506aee1

Publisher

IEEE

ISSN

0018-9340

Source

IEEE Transactions on Computers, 41 (10)

Part of collection

Institutional Repository

Document type

journal article

Rights

(c) 1992 Mulder, H.; Flynn, M.J.