Title
CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out
Author
Singh, A. (TU Delft Computer Engineering)
Zahedi, M.Z. (TU Delft Computer Engineering)
Shahroodi, Taha (TU Delft Computer Engineering)
Gupta, Mohit (IMEC-Solliance)
Gebregiorgis, A.B. (TU Delft Computer Engineering)
Komalan, Manu (IMEC-Solliance)
Joshi, R.V. (IBM Thomas J. Watson Research Centre)
Catthoor, Francky (IMEC-Solliance)
Bishnoi, R.K. (TU Delft Computer Engineering)
Hamdioui, S. (TU Delft Quantum & Computer Engineering) ![ORCID 0000-0002-8961-0387 ORCID 0000-0002-8961-0387](/sites/all/themes/tud_repo3/img/icons/orcid_16x16.png)
Department
Quantum & Computer Engineering
Date
2022
Abstract
Spin-transfer torque magnetic random access memory (STT-MRAM) based computation-in-memory (CIM) architectures have shown great prospects for an energy-efficient computing. However, device variations and non-idealities narrow down the sensing margin that severely impacts the computing accuracy. In this work, we propose an adaptive referencing mechanism to improve the sensing margin of a CIM architecture for boolean binary logic (BBL) operations. We generate reference signals using multiple STT-MRAM devices and place them strategically into the array such that these signals can address the variations and trace the wire parasitics effectively. We have demonstrated this behavior using an STT-MRAM model, which is calibrated using 1Mbit characterized array. Results show that our proposed architecture for binary neural networks (BNN) achieves up to 17.8 TOPS/W on the MNIST dataset and 130× performance improvement for the text encryption compared to the software implementation on Intel Haswell processor.
Subject
binary logic
binary neural networks
computation-in-memory
STT-MRAM
To reference this document use:
http://resolver.tudelft.nl/uuid:2b7dd922-94ff-48e6-869c-f757d1fc56d3
DOI
https://doi.org/10.1109/AICAS54282.2022.9869993
Publisher
IEEE
Embargo date
2023-07-01
ISBN
9781665409964
Source
Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022
Event
4th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022, 2022-06-13 → 2022-06-15, Incheon, Korea, Republic of
Series
Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022
Bibliographical note
Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
Part of collection
Institutional Repository
Document type
conference paper
Rights
© 2022 A. Singh, M.Z. Zahedi, Taha Shahroodi, Mohit Gupta, A.B. Gebregiorgis, Manu Komalan, R.V. Joshi, Francky Catthoor, R.K. Bishnoi, S. Hamdioui