Title
Analyzing the Use of Temperature to Facilitate Fault Propagation in ReRAMs
Author
Copetti, T. S. (Rheinisch-Westfälische Technische Hochschule)
Chordia, A. (Rheinisch-Westfälische Technische Hochschule)
Fieback, M. (TU Delft Computer Engineering) ![ORCID 0000-0002-9782-393X ORCID 0000-0002-9782-393X](/sites/all/themes/tud_repo3/img/icons/orcid_16x16.png)
Taouil, M. (TU Delft Computer Engineering) ![ORCID 0000-0002-9911-4846 ORCID 0000-0002-9911-4846](/sites/all/themes/tud_repo3/img/icons/orcid_16x16.png)
Hamdioui, S. (TU Delft Computer Engineering) ![ORCID 0000-0002-8961-0387 ORCID 0000-0002-8961-0387](/sites/all/themes/tud_repo3/img/icons/orcid_16x16.png)
Bolzani Poehls, L. M. (Rheinisch-Westfälische Technische Hochschule)
Date
2024
Abstract
Resistive Random-Access Memories (ReRAMs) represent a promising candidate to complement and/or replace CMOS-based memories used in several emerging applications. Despite all the advantages of using these novel memories, mainly due to the memristive device's CMOS manufacturing process compatibility, zero standby power consumption, as well as, high scalability and density, the use of them in real applications depends on being able to guarantee their quality after manufacturing. As observed in CMOS-based memories, ReRAMs are also susceptible to manufacturing deviations, defects, and process variations, that can cause faulty behaviors different from the ones observed in CMOS technology, increasing not only the manufacturing test complexity but also the time required to perform the test. In this context, this paper proposes to study the use of temperature to facilitate fault propagation in ReRAMs, reducing the required test time. A case study composed of a 3x3 word-based ReRAM with peripheral circuitry implemented based on a 130 nm Predictive Technology Model (PTM) library was adopted. During the proposed study, a total of 17 defects were injected in different positions of the ReRAM cell, and their respective faulty behavior was classified into traditional and unique faults, considering three temperatures (25, 100, and -40°C). The obtained results show that the temperature can, depending on the position of the defect, facilitate fault propagation, which reduces the time required for performing manufacturing testing.
Subject
Manufacturing Testing
ReRAMs
Unique Faults
To reference this document use:
http://resolver.tudelft.nl/uuid:565fa3b9-5f27-4922-a8af-d2b621e23429
DOI
https://doi.org/10.1109/LATS62223.2024.10534600
Publisher
IEEE
Embargo date
2024-12-02
ISBN
9798350365559
Source
2024 IEEE 25th Latin American Test Symposium, LATS 2024
Event
25th IEEE Latin American Test Symposium, LATS 2024, 2024-04-09 → 2024-04-12, Maceio, Brazil
Series
2024 IEEE 25th Latin American Test Symposium, LATS 2024
Bibliographical note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
Part of collection
Institutional Repository
Document type
conference paper
Rights
© 2024 T. S. Copetti, A. Chordia, M. Fieback, M. Taouil, S. Hamdioui, L. M. Bolzani Poehls